mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 270

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
SECTION 12
SYSTEM INTERFACE UNIT
The system interface unit controls system startup, initialization, operation, and protection,
as well as the external system bus. The system configuration and protection function
controls the overall system and provides various monitors and timers, including the bus
monitor, software watchdog timer, periodic interrupt timer, PowerPC
timebase, and real-time clock. The clock synthesizer generates the clock signals for other
modules and external devices that the system interface unit uses. This circuitry generates
the system clock from an inexpensive 32kHz crystal or an oscillator with a maximum
frequency of 5MHz. The system interface unit supports various low-power modes that
supply different ranges of power consumption, functionality, and wake-up time. The clock
scheme supports low-power modes for applications that use baud rate generators and/or
serial ports in standby mode. The main system clock can be changed dynamically, but the
baud rate generators and serial ports work with a fixed frequency. For more information on
clocks, refer to Section 5 Clocks and Power Control.
The external bus interface handles the transfer of information between internal buses and
the memory or peripherals in the external address space. The MPC823 is designed to allow
external bus masters to request and obtain mastership of the system bus. For additional
information on bus operation, see Section 13 External Bus Interface. The memory
controller module provides a glueless interface to many types of memory devices and
peripherals and it supports a maximum of eight memory banks, each with their own device
and timing attributes. Memory control services are provided to both internal and external
masters. The MPC823 supports circuitboard test strategies through a user-accessible test
logic that is fully compliant with information in Section 21 IEEE 1149.1 Test Access Port.
The PCMCIA host adapter module provides all control logic for a PCMCIA interface fully
compliant with the PCMCIA Standard, Release 2.1+ (PC Card -16). It can support one
PCMCIA socket with a maximum of eight memory or I/O windows.
Note: The MPC823’s external address bus is 26 bits wide, while the internal address
Note: Both the MPC823 and MPC821 have the same PCMCIA module except that the
bus is 32 bits wide. Therefore, external accesses are considered internally as
26-bit accesses (A[6:31]) with A[0:5] equal to 0, while internal accesses are full
32-bit accesses.
MPC823 has only one valid slot (Slot B). Programming a window to be assigned
to Slot A may cause an erroneous operation.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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