mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 256
mpc823rg
Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC823RG.pdf
(1348 pages)
- Current page: 256 of 1348
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PS—Page Size
SH—Shared Page
ASID—Address Space ID
This field is the address space ID of the TLB entry to be compared with the CASID field of
the M_CASID register.
11.6.2.2 MMU DATA RAM ENTRY READ REGISTER 0. The MMU data RAM entry read
register 0 (MD_RAM0) contains the physical page number and page attributes of an entry
indexed by the DTLB_INDX field of the MD_CTR. This register is only updated when you
write a value to it.
RPN—Real Page Number
These bits are the most-significant bits of the page’s physical address.
MD_RAM0
NOTE: — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
000 = 4K.
001 = 16K.
011 = 512K.
111 = 8M.
010 = Reserved.
100 = Reserved.
101 = Reserved.
110 = Reserved.
0 = This entry matches only if the ASID field in the data TLB entry matches the value
1 = ASID comparison is disabled for the entry.
of the M_CASID register.
16
0
17
1
RPN
—
R
18
2
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
PS
21
—
R
5
22
6
23
SPR 825
SPR 825
7
RPN
—
R
24
8
APGI
—
R
25
9
10
26
11
27
—
G
R
Memory Management Unit
WT
12
28
—
R
13
29
CI
—
R
RESERVED
14
30
R
0
11-39
15
31
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