mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1346

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

termination signals,
terminology,
TERx,
TESR,
test access port
TEXP,
TGATE1,
TGATE2,
TGCRx,
timebase and decrementer register key,
timebase reference register 0 key,
timebase reference register 1 key,
timebase reference registers,
timebase register mapping,
timebase register,
timebase status and control register key,
timebase status and control register,
timebase,
time-fill,
timer capture registers (TCRx),
timer counter registers (TCNx),
timer event registers (TERx),
timer global configuration register (TGCRx),
timer global configuration register,
timer mode registers (TMRx),
timer reference registers (TRRx),
timers
timers,
time-slot assigner
timing
timing, instruction cycles,
timing, single buffer,
TIN1,
TIN2,
TIN3,
block diagram,
boundary scan bit order,
boundary scan register,
instruction register,
instructions
restrictions,
TAP controller,
key memory map,
memory map,
configuration,
connections,
features,
bus arbitration (illustration),
SCCx,
21-1
2-8
2-9
2-8
16-81
2-7
12-36
16-74
bypass,
clamp,
extest,
hi-z,
sample/preload,
16-270
16-77
2-10
2-10
12-14
16-186
24-1
21-20
16-114
21-20
21-19
21-21
21-20
16-117
16-114
12-14
3-7
21-2
21-3
13-37
16-110
3-4
21-19
21-20
8-1
6-16
21-4
Freescale Semiconductor, Inc.
21-6
16-81
12-15
16-78
For More Information On This Product,
16-80
16-80
13-30
16-79
16-76
5-27
5-27
12-16
MPC823 REFERENCE MANUAL
5-27
5-27
Go to: www.freescale.com
16-77
TIN4,
TLB manipulation
tlbia,
tlbie,
TMRx,
TMS,
tokens
TOUT1,
TOUT2,
tracking microcontroller loading,
transfer error status register,
transfer start,
transfers on the bus
transfers, burst-inhibited,
translation table structure,
transparency decoding, receiver,
transparency encoding, transmitter,
Transparent mode
TRRx,
TRST,
TS,
TSA (definition),
TSIZ,
TSIZ0,
TSIZ1,
TXD,
TXD2,
TXD3,
types of watchpoints and breakpoints,
U
UART
UART (definition),
UART mode
universal serial bus
loading the reserved TLB entries,
TLB invalidation,
TLB replacement counter,
IN,
PRE,
SETUP,
SOF,
alignment and packaging,
basic,
burst,
read
single beat,
write
SCCx,
2-2
character format,
SCCx,
SMC,
11-15
11-15
16-318
2-12
2-9
13-33
16-79
2-8
2-9
2-12
16-78
2-2
2-2
16-354
,
bytes,
patterns,
2-8
2-9
13-5
16-355
16-355
13-16
13-8
16-298
16-354
13-31
13-26
13-8
16-112
13-27
16-198
11-51
16-198
13-16
11-5
12-36
13-25
11-51
16-25
16-268
16-268
11-51
20-11
Index-33
Index