mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 586

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
16.7.5.3 SERIAL INTERFACE CLOCK ROUTE REGISTER. The 32-bit, read/write,
memory-mapped serial interface clock route (SICR) register is used to define the universal
serial bus and serial communication controller clock sources that can be one of the four
baud rate generators or an input from a bank of clock pins.
Bits 0–7—Reserved
These bits are reserved and must be set to 0.
GR3—Grant Support of SCC3
SC3—SCC3 Connection
SICR
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = SCC3 transmitter does not support the grant mechanism. The grant is always
1 = SCC3 transmitter supports the grant mechanism as determined by the GMx bit
0 = SCC3 is not connected to the multiplexed serial interface but is either connected
1 = SCC3 is connected to the multiplexed serial interface. The NMSI3 receive pins are
asserted internally.
of the SIMODE register.
directly to the NMSI3 pins or is not used. You can choose either the
general-purpose I/O port pins or dedicated SCC3 pins in the parallel I/O port
registers. See Section 16.14 The Parallel I/O Ports for more information.
available for other purposes.
GR2
R/W
16
0
0
SC2
R/W
17
1
0
18
2
Freescale Semiconductor, Inc.
R2CS
RESERVED
R/W
For More Information On This Product,
19
3
0
R/W
0
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
(IMMR & 0xFFFF0000) + 0xAEC
(IMMR & 0xFFFF0000) + 0xAEE
T2CS
R/W
22
6
0
23
7
GR3
R/W
24
8
0
RES
R/W
0
SC3
R/W
25
9
0
10
26
R3CS
R1CS
R/W
R/W
11
27
0
0
12
28
13
29
RESERVED
MOTOROLA
T3CS
R/W
R/W
14
30
0
0
15
31

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