mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1291
mpc823rg
Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MPC823RG.pdf
(1348 pages)
- Current page: 1291 of 1348
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MPC823 Instruction Set—stswx
stswx
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
18
B
2
Freescale Semiconductor, Inc.
31
For More Information On This Product,
19
3
else b
EA
n
r
i
do while
if i = 32 then r
MEM(EA, 1)
i
if i = 64 then i
EA
n
of bytes to store. Let nr = CEIL( n
registers to supply data. n consecutive bytes starting at EA are
stored from GPRs rS through rS + nr – 1. Bytes are stored left to
right from each register. The sequence of registers wraps
around through r0 if required. If n = 0, no bytes are stored. Under
certain conditions (for example, segment boundary crossing) the
data alignment exception handler may be invoked.
Note that, in some implementations, this instruction is likely to
have a greater latency and take longer to execute, perhaps
much longer, than a sequence of individual load or store
instructions that produce the same results.
stswx
Store String Word Indexed
if rA = 0 then b
EA is the sum (rA|0) + (rB). Let n = XER[25–31]; n is the number
POWERPC ARCHITECTURE
20
32
i + 8
rS – 1
n
MPC823 REFERENCE MANUAL
4
XER[25–31]
– 1
b + (rB)
EA + 1
Go to: www.freescale.com
n
21
(rA)
5
> 0
LEVEL
UISA
rS,rA,rB
22
6
GPR(r)[i–i + 7]
32
r + 1 (mod 32)
0
23
7
24
S
8
25
9
SUPERVISOR
861
10
26
4); nr is the number of
11
27
OPTIONAL
12
28
13
29
A
MOTOROLA
14
30
FORM
X
15
31
0
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