MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 98

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Enhanced Multiply-Accumulate Unit (EMAC)
4.2
The MAC is an extension of the basic multiplier found in most microprocessors. It is typically
implemented in hardware within an architecture and supports rapid execution of signal processing
algorithms in fewer cycles than comparable non-MAC architectures. For example, small digital
filters can tolerate some variance in an algorithm’s execution time, but larger, more complicated
algorithms such as orthogonal transforms may have more demanding speed requirements beyond
the scope of any processor architecture and may require full DSP implementation.
To strike a balance between speed, size, and functionality, the ColdFire MAC is optimized for a
small set of operations that involve multiplication and cumulative additions. Specifically, the
multiplier array is optimized for single-cycle pipelined operations with a possible accumulation
after product generation. This functionality is common in many signal processing applications.
The ColdFire core architecture also has been modified to allow an operand to be fetched in parallel
with a multiply, increasing overall performance for certain DSP operations.
Consider a typical filtering operation where the filter is defined as in
Here, the output y(i) is determined by past output values and past input values. This is the general
form of an infinite impulse response (IIR) filter. A finite impulse response (FIR) filter can be
obtained by setting coefficients a(k) to zero. In either case, the operations involved in computing
such a filter are multiplies and product summing. To show this point, reduce the above equation to
a simple, four-tap FIR filter, shown in
data values and coefficients.
4-2
Introduction to the MAC
Figure 4-1. Multiply-Accumulate Functionality Diagram
Figure 4-2. Infinite Impulse Response (IIR) Filter
y i ( )
=
N 1
k
∑
=
MCF5271 Reference Manual, Rev. 2
–
Operand Y
1
a
k ( )y i k
Figure
Accumulator(s)
(
Shift 0,1,-1
4-3, in which the accumulated sum is a sum of past
–
+ / -
X
)
+
Operand X
N 1
k
∑
=
–
0
b
k ( )x i k
(
–
Figure
)
4-2.
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