MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 108

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Enhanced Multiply-Accumulate Unit (EMAC)
if extension word, bit [5] = 1, the MASK bit, then
Here, oa is the calculated operand address and se_d16 is a sign-extended 16-bit displacement. For
auto-addressing modes of post-increment and pre-decrement, the calculation of the updated An
value is also shown.
Use of the post-increment addressing mode, {(An)+} with the MASK is suggested for circular
queue implementations.
4.5
Table 4-3
4-12
Multiply Signed
Multiply Unsigned
Multiply Accumulate
Multiply Accumulate
with Load
Load Accumulator
Store Accumulator
Copy Accumulator
Load MACSR
Store MACSR
Store MACSR to CCR
Load MAC Mask Reg
Store MAC Mask Reg
Load AccExtensions01
Command
if <ea> = (An)
if <ea> = (An)+
if <ea> =-(An)
if <ea> = (d16,An)
summarizes EMAC unit instructions.
EMAC Instruction Set Summary
oa
oa
An = (An + 4) & {0xFFFF, MASK}
oa
An = (An - 4) & {0xFFFF, MASK}
oa
MULS <ea>y,Dx
MULU <ea>y,Dx
MAC Ry,RxSF,ACCx
MSAC Ry,RxSF,ACCx
MAC Ry,Rx,<ea>y,Rw,ACCx
MSAC Ry,Rx,<ea>y,Rw,ACCx
MOV.L {Ry,#imm},ACCx
MOV.L ACCx,Rx
MOV.L ACCy,ACCx
MOV.L MACSR,Rx
MOV.L MACSR,CCR
MOV.L MASK,Rx
MOV.L {Ry,#imm},ACCext01
MOV.L {Ry,#imm},MACSR
MOV.L {Ry,#imm},MASK
=
=
= (An - 4) & {0xFFFF, MASK}
= (An + se_d16) & {0xFFFF0x, MASK}
An & {0xFFFF, MASK}
An
Table 4-3. EMAC Instruction Summary
Mnemonic
MCF5271 Reference Manual, Rev. 2
Multiplies two signed operands yielding a signed result
Multiplies two unsigned operands yielding an unsigned result
Multiplies two operands and adds/subtracts the product
to/from an accumulator
Multiplies two operands and combines the product to an
accumulator while loading a register with the memory operand
Loads an accumulator with a 32-bit operand
Writes the contents of an accumulator to a CPU register
Copies a 48-bit accumulator
Writes a value to MACSR
Write the contents of MACSR to a CPU register
Write the contents of MACSR to the CCR
Writes a value to the MASK register
Writes the contents of the MASK to a CPU register
Loads the accumulator 0,1 extension bytes with a 32-bit
operand
Description
Freescale Semiconductor