MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 138

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Clock Module
7.1.2
Features of the clock module include:
7.1.3
The PLL operational mode must be configured during reset. The CLKMOD[1:0] package pins
must be driven to the appropriate state for the desired mode from the time RSTOUT asserts until
it negates. Refer to
during reset, the PLL will not default to any mode (so these pins must be hard-tied to power or
ground for desired mode).
The clock module can be operated in normal PLL mode with crystal reference, normal PLL mode
with external reference, 1:1 PLL mode, or external clock mode.
7-4
• 8- to 25-MHz reference crystal oscillator
• Current controlled oscillator range from 50 MHz to 150 MHz
• Reduced frequency divider for reduced frequency operation without forcing the PLL to
• Programmable frequency modulation
• Support for low-power modes
• Self-clocked mode operation
• Separate clock out signal
re-lock
Features
Modes of Operation
EXTAL
XTAL
CLKMOD[1:0]
Bus Interface
Table 7-3
OSC
for valid states of CLKMOD[1:0]. If CLKMOD[1:0] are not asserted
Figure 7-3. PLL Block Diagram
MCF5271 Reference Manual, Rev. 2
Charge Pumps
Control/Status
Registers
PFD/
Approximation
Successive
Frequency
Search
Filter
MFD
ICO
Control
FM
Freescale Semiconductor
PLL OUT

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