MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 18

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

19.3.6
19.3.7
19.3.8
19.3.9
19.3.10
19.3.11
19.3.12
19.3.13
19.3.14
19.3.14.1
19.3.14.2
20.1
20.1.1
20.1.2
20.2
20.2.1
20.2.1.1
20.2.1.2
20.2.1.3
20.2.1.4
21.1
21.1.1
21.1.2
21.1.3
21.2
21.2.1
21.2.1.1
21.2.1.2
21.2.1.3
21.3
21.3.1
21.3.2
xviii
Paragraph
Number
Introduction................................................................................................................... 20-1
Memory Map/Register Definition ................................................................................ 20-2
Introduction................................................................................................................... 21-1
Memory Map/Register Definition ................................................................................ 21-2
Functional Description.................................................................................................. 21-6
FEC Frame Transmission ....................................................................................... 19-38
FEC Frame Reception............................................................................................. 19-39
Ethernet Address Recognition ................................................................................ 19-40
Hash Algorithm....................................................................................................... 19-42
Low-Power Mode Operation .................................................................................... 20-1
Block Diagram.......................................................................................................... 20-2
Register Description ................................................................................................. 20-2
Overview................................................................................................................... 21-1
Block Diagram.......................................................................................................... 21-1
Low-Power Mode Operation .................................................................................... 21-2
Register Description ................................................................................................. 21-3
Set-and-Forget Timer Operation............................................................................... 21-6
Free-Running Timer Operation ................................................................................ 21-6
Full Duplex Flow Control...................................................................................... 19-45
Inter-Packet Gap (IPG) Time................................................................................. 19-46
Collision Handling................................................................................................. 19-46
Internal and External Loopback............................................................................. 19-46
Ethernet Error-Handling Procedure ....................................................................... 19-47
Programmable Interrupt Timer Modules (PIT0–PIT3)
Watchdog Control Register (WCR)...................................................................... 20-3
Watchdog Modulus Register (WMR)................................................................... 20-4
Watchdog Count Register (WCNTR)................................................................... 20-4
Watchdog Service Register (WSR) ...................................................................... 20-4
PIT Control and Status Register (PCSRn)............................................................ 21-3
PIT Modulus Register (PMRn)............................................................................. 21-5
PIT Count Register (PCNTRn)............................................................................. 21-5
Transmission Errors........................................................................................... 19-47
Reception Errors ................................................................................................ 19-48
Watchdog Timer Module
MCF5271 Reference Manual, Rev. 2
Contents
Chapter 20
Chapter 21
Title
Freescale Semiconductor
Number
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