MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 340

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Synchronous DRAM Controller Module
The DACRs should be programmed as shown in
This configuration results in a value of DACR0 = 0xFF88_0300, as described in
DACR1 initialization is not needed because there is only one block. Subsequently,
DACR1[RE,IMRS,IP] should be cleared; everything else is a don’t care.
18-22
1 Mbyte
Setting
Setting
(hex)
(hex)
Field
Field RE
31–18
17–16
13–12
10–8
31
15
Bits
1
0
15
14
11
7
6
512 Kbyte
512 Kbyte
Bank 0
—
30
14
1
0
Name
CASL
IMRS
CBM
F
0
BA
RE
—
—
—
—
29
13
1
0
CASL
Figure 18-13. DACR Register Configuration
1 Mbyte
Table 18-28. DACR Initialization Values
1111_1111_
28
12
1000_10
1
0
Figure 18-12. SDRAM Configuration
Setting
011
00
00
0
0
0
0
0
—
27
11
1
0
MCF5271 Reference Manual, Rev. 2
Base address. So DACR0[31–16] = 0xFF88, placing the starting
address of the SDRAM accessible memory at 0xFF88_0000.
Reserved.
Keeps auto-refresh disabled because registers are being set up
at this time.
Reserved.
Indicates a delay of data 1 cycle after SD_SCAS is asserted
Reserved.
Command bit is pin 20 and bank selects are 21 and up.
Reserved.
Indicates
512 Kbyte
512 Kbyte
26
10
1
0
Bank 1
SDRAM Component
F
3
CBM
25
1
1
9
MRS
BA
1 Mbyte
command has not been initiated.
24
Figure
1
8
1
—
23
1
0
7
18-13.
Description
IMRS
22
0
0
6
512 Kbyte
512 Kbyte
Bank 2
8
0
21
0
0
5
PS
20
0
0
4
1 Mbyte
Accessible
Memory
IP
19
1
0
3
Freescale Semiconductor
—
18
0
0
2
512 Kbyte
512 Kbyte
8
0
Bank 3
Table
—
—
17
0
0
1
—
—
16
18-28.
0
0
0