MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 338
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MCF5270CAB100
Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5270CAB100
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Synchronous DRAM Controller Module
18.4
This example interfaces a 512K x 32-bit x 4 bank SDRAM component to a MCF5271 operating
at 40 MHz bus speed (80 MHz core).
18.4.1 SDRAM Interface Configuration
To interface this component to the MCF5271 DRAM controller, use the connection table that
corresponds to a 32-bit port size with 8 columns
when the part is functional.
18-20
SDRAM Example
Speed grade (-8E)
10 rows, 8 columns
Two bank-select lines to access four internal banks
ACTV
Period between auto-refresh and
ACTV
Precharge command to
Last data input to
Auto-refresh period for 4096 rows (t
-to-read/write delay (t
command to precharge command (t
Figure 18-10. Mode Register Set (
Table 18-25. SDRAM Example Specifications
SD_CS[1] or [0]
Table 18-26
PALL
SD_SCAS
SD_SRAS,
CLKOUT
SD_WE
D[31:0]
A[31:0]
command (t
Parameter
ACTV
MCF5271 Reference Manual, Rev. 2
RCD
command (t
)
Table 18-25
ACTV
shows the proper hardware connections.
RWL
REF
)
command (t
)
RAS
RP
)
(Table
MRS
)
lists design specifications for this example.
RC
)
18-24). Two pins select one of four banks
MRS
40 MHz (25-ns period)
20 ns (min.)
70 ns
48 ns (min.)
20 ns (min.)
1 bus clock (25 ns)
64 mS
) Command
Specification
Freescale Semiconductor
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