MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 243

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

12.3.1.7 Drive Strength Control Registers (DSCR_x)
The drive strength control registers set the output pin drive strengths. All drive strength control
registers are read/write.
12.3.1.7.1 External Bus Drive Strength Control Register (DSCR_EIM)
The DSCR_EIM register controls the output drive strengths of several external bus pins: A[23:0],
D[31:0], BS[3:0], OE, R/W, CS[7:0], SD_SCAS, SD_SRAS, SD_WE, SCKE, SD_CS[1:0],
RSTOUT, TA, TEA, TIP, TS, and TSIZ[1:0].
Freescale Semiconductor
15–8
Bits
7–0
PAR_DT3OUT
PAR_DT2OUT
PAR_DT1OUT
PAR_DT0OUT
PAR_DT3IN
PAR_DT2IN
PAR_DT1IN
PAR_DT0IN
Name
Table 12-17. PAR_TIMER Field Description
Timer input pin assignment. These bit fields configure the DT3IN, DT2IN, DT1IN, and
DT0IN pins for one of their primary functions or GPIO.
Timer output pin assignment. These bit fields configure the DT3OUT, DT2OUT,
DT1OUT, and DT0OUT pins for one of their primary functions or GPIO.
MCF5271 Reference Manual, Rev. 2
00
01
10
11
00
01
10
11
PAR_T3OUT PAR_T2OUT PAR_T1OUT
QSPI_CS3
QSPI_CS2
PAR_T3IN
DT3OUT
U2RTS
U2CTS
DT3IN
GPIO
GPIO
PAR_T2IN
DT2OUT
DT2OUT
DACK2
DREQ2
DT2IN
GPIO
GPIO
Description
GPIO
PAR_T1IN
DT1OUT
DT1OUT
DREQ1
DACK1
DT1IN
GPIO
GPIO
GPIO
Memory Map/Register Definition
PAR_T0OU
PAR_T0IN
DT0OUT
DACK0
DREQ0
DT0IN
GPIO
GPIO
GPIO
GPIO
T
12-27