MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 12

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

10.4.2.1
10.4.2.2
10.4.2.3
10.4.3
10.4.3.1
10.4.3.2
11.1
11.1.1
11.1.2
11.2
11.2.1
11.2.1.1
11.2.1.2
11.2.1.3
11.2.1.4
11.2.1.5
11.3
11.3.1
11.3.2
11.3.2.1
11.3.2.2
11.3.3
11.4
11.4.1
11.4.2
11.4.3
11.4.3.1
11.4.3.2
11.4.3.3
12.1
12.1.1
12.1.2
xii
Paragraph
Number
Introduction................................................................................................................... 11-1
Memory Map/Register Definition ................................................................................ 11-2
Internal Bus Arbitration ................................................................................................ 11-9
System Access Control Unit (SACU)......................................................................... 11-12
Introduction................................................................................................................... 12-1
Concurrent Resets ..................................................................................................... 10-8
Overview................................................................................................................... 11-1
Features..................................................................................................................... 11-1
Register Descriptions................................................................................................ 11-3
Overview................................................................................................................... 11-9
Arbitration Algorithms ........................................................................................... 11-10
Bus Master Park Register (MPARK)...................................................................... 11-11
Overview................................................................................................................. 11-13
Features................................................................................................................... 11-13
Memory Map/Register Definition .......................................................................... 11-14
Overview................................................................................................................... 12-3
Features..................................................................................................................... 12-3
Synchronous Reset Requests ................................................................................ 10-8
Internal Reset Request .......................................................................................... 10-8
Power-On Reset .................................................................................................... 10-8
Reset Flow ............................................................................................................ 10-8
Reset Status Flags ................................................................................................. 10-9
Internal Peripheral System Base Address Register (IPSBAR)............................. 11-3
Memory Base Address Register (RAMBAR) ...................................................... 11-4
Core Reset Status Register (CRSR)...................................................................... 11-6
Core Watchdog Control Register (CWCR) .......................................................... 11-7
Core Watchdog Service Register (CWSR)........................................................... 11-8
Round-Robin Mode ............................................................................................ 11-10
Fixed Mode......................................................................................................... 11-11
Master Privilege Register (MPR) ....................................................................... 11-14
Peripheral Access Control Registers (PACR0–PACR8).................................... 11-15
Grouped Peripheral Access Control Register (GPACR) .................................... 11-17
System Control Module (SCM)
General Purpose I/O Module
MCF5271 Reference Manual, Rev. 2
Contents
Chapter 11
Chapter 12
Title
Freescale Semiconductor
Number
Page