MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 6

no-image

MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.3.9
2.3.10
2.3.11
2.3.12
2.3.13
2.3.14
2.4
3.1
3.2
3.2.1
3.2.1.1
3.2.1.2
3.2.1.3
3.2.1.4
3.2.1.5
3.2.2
3.2.3
3.2.3.1
3.2.3.2
3.2.3.3
3.2.3.4
3.2.3.5
3.2.3.6
3.3
3.4
3.5
3.6
3.7
3.7.1
3.7.2
vi
Paragraph
Number
External Boot Mode...................................................................................................... 2-15
Processor Pipelines ......................................................................................................... 3-1
Processor Register Description ....................................................................................... 3-2
Memory Map/Register Definition .................................................................................. 3-8
Additions to the Instruction Set Architecture ................................................................. 3-9
Exception Processing Overview ..................................................................................... 3-9
Exception Stack Frame Definition................................................................................ 3-11
Processor Exceptions .................................................................................................... 3-13
PLL and Clock Signals ............................................................................................... 2-8
Mode Selection ........................................................................................................... 2-8
External Memory Interface Signals ............................................................................ 2-8
SDRAM Controller Signals ........................................................................................ 2-9
External Interrupt Signals ......................................................................................... 2-10
Ethernet Module (FEC) Signals................................................................................ 2-10
I2C I/O Signals ......................................................................................................... 2-11
Queued Serial Peripheral Interface (QSPI)............................................................... 2-11
UART Module Signals ............................................................................................. 2-12
DMA Timer Signals.................................................................................................. 2-12
Debug Support Signals ............................................................................................. 2-13
Test Signals............................................................................................................... 2-14
Power and Ground Pins ............................................................................................ 2-15
User Programming Model .......................................................................................... 3-2
EMAC Register Description....................................................................................... 3-4
Supervisor Register Description ................................................................................. 3-5
Access Error Exception ............................................................................................ 3-13
Address Error Exception........................................................................................... 3-13
Data Registers (D0–D7) ......................................................................................... 3-2
Address Registers (A0–A6).................................................................................... 3-3
Stack Pointer (A7) .................................................................................................. 3-3
Program Counter (PC) ............................................................................................ 3-3
Condition Code Register (CCR)............................................................................. 3-4
Status Register (SR)................................................................................................ 3-6
Supervisor/User Stack Pointers (A7 and OTHER_A7).......................................... 3-7
Vector Base Register (VBR) .................................................................................. 3-7
Cache Control Register (CACR) ............................................................................ 3-7
Access Control Registers (ACR0, ACR1).............................................................. 3-8
SRAM Base Address Register (RAMBAR)........................................................... 3-8
MCF5271 Reference Manual, Rev. 2
ColdFire Core
Contents
Chapter 3
Title
Freescale Semiconductor
Number
Page

Related parts for MCF5270CAB100