MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 581

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Operand Data:
Result Data:
30.5.3.3.7 Resume Execution (
The pipeline is flushed and refilled before normal instruction execution resumes. Prefetching
begins at the current address in the PC and at the current privilege level. If any register (such as
the PC or SR) is altered by a BDM command while the processor is halted, the updated value is
used when prefetching resumes. If a
command is ignored.
Command Sequence:
Operand Data:
Result Data:
30.5.3.3.8 No Operation (
NOP
Command Formats:
Command Sequence:
Freescale Semiconductor
performs no operation and may be used as a null command where required.
15
15
14
14
0x0
0x0
13
13
12
A single operand is data to be written to the memory location. Byte data is
sent as a 16-bit word, justified in the least-significant byte; 16- and 32-bit
operands are sent as 16 and 32 bits, respectively.
Command complete status (0xFFFF) is returned when the register write is
complete. A value of 0x0001 (with S set) is returned if a bus error occurs.
None
The command-complete response (0xFFFF) is returned during the next shift
operation.
12
11
Figure 30-30.
11
Figure 30-31.
Figure 30-29.
NOP
10
10
MCF5271 Reference Manual, Rev. 2
)
0xC
0x0
GO
???
GO
GO
9
9
)
GO
command is issued and the CPU is not halted, the
NOP
GO
8
8
Command Sequence
Command Format
Command Format
’CMD COMPLETE’
7
7
NEXT CMD
6
6
0x0
0x0
5
5
4
4
Background Debug Mode (BDM)
3
3
2
2
0x0
0x0
1
1
0
0
30-31