MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 462

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

UART Modules
24.4.3
The UART can be configured to operate in various looping modes as shown in
These modes are useful for local and remote system diagnostic functions. The modes are described
in the following paragraphs and in
The UART’s transmitter and receiver should be disabled when switching between modes. The
selected mode is activated immediately upon mode selection, regardless of whether a character is
being received or transmitted.
24.4.3.1 Automatic Echo Mode
In automatic echo mode, shown in
bit by bit. The local CPU-to-receiver communication continues normally, but the
CPU-to-transmitter link is disabled. In this mode, received data is clocked on the receiver clock
and re-sent on UnTXD. The receiver must be enabled, but the transmitter need not be.
Because the transmitter is inactive, USRn[TxEMP,TxRDY] are inactive and data is sent as it is
received. Received parity is checked but is not recalculated for transmission. Character framing is
also checked, but stop bits are sent as they are received. A received break is echoed as received
until the next valid start bit is detected.
24.4.3.2 Local Loop-Back Mode
Figure 24-22
This mode is for testing the operation of a local UART module channel by sending data to the
transmitter and checking data assembled by the receiver to ensure proper operations.
24-24
Looping Modes
shows how UnTXD and UnRXD are internally connected in local loop-back mode.
The receiver can still read characters in the FIFO if the receiver is
disabled. If the receiver is reset, the FIFO, UnRTS control, all receiver
status bits, and interrupts, and DMA requests are reset. No more
characters are received until the receiver is reenabled.
CPU
Disabled
Figure 24-21. Automatic Echo
MCF5271 Reference Manual, Rev. 2
Section 24.3, “Memory Map/Register
Figure
Rx
Tx
24-21, the UART automatically resends received data
NOTE
Disabled
UnRXD Input
UnTXD Output
Definition.”
Freescale Semiconductor
Figure
24-20.