MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 227

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Reading a PODR_x register returns the current values in the register, not the port x pin values. To
set bits in a PODR_x register, write 1s to the PODR_x bits, or write 1s to the corresponding bits in
the PPDSDR_x register. To clear bits in a PODR_x register, write 0s to the PODR_x bits, or write
0s to the corresponding bits in the PCLRR_x register.
Freescale Semiconductor
Address
Address
Reset
Reset
Figure 12-4. Port ADDR Output Data Register (PODR_ADDR)
Address
Address
W
W
R
R
Figure 12-5. Port CS Output Data Register (PODR_CS)
Reset
Reset
Figure 12-2. Port x Output Data Registers (PODR_x)
Figure 12-3. Port x Output Data Registers (PODR_x)
IPSBAR + 0x10_0003 (PODR_BUSCTL); ;IPSBAR + 0x10_0009 (PODR_UARTL);
IPSBAR + 0x10_0001 (PODR_DATAH); IPSBAR + 0x10_0002 (PODR_DATAL);
W
W
R
R
IPSBAR + 0x10_0004 (PODR_BS); IPSBAR + 0x10_0007 (PODR_FECI2C)
1
0
7
7
0
1
1
7
7
PODR_ADDR
6
1
6
0
0
MCF5271 Reference Manual, Rev. 2
1
1
6
6
IPSBAR + 0x10_000B (PODR_TIMER)
IPSBAR + 0x10_0000 (PODR_ADDR)
IPSBAR + 0x10_0005 (PODR_CS)
5
1
5
0
0
1
1
5
5
PODR_CS
1
0
0
4
4
0
0
1
4
4
PODR_x
0
0
1
3
3
1
1
3
3
2
0
0
2
1
1
1
2
2
PODR_x
0
0
1
1
1
1
1
1
1
Memory Map/Register Definition
0
0
0
0
0
0
1
1
0
0
12-11