MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 255

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MCF5270CAB100

Manufacturer Part Number
MCF5270CAB100
Description
MCU V2 COLDFIRE 64K SRAM 160-QFP
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets

Specifications of MCF5270CAB100

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
100MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
160-QFP
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5270CAB100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
13.2.1.2 Interrupt Mask Register (IMRH, IMRL)
The IMRH and IMRL registers are each 32 bits in size and provide a bit map for each interrupt to
allow the request to be disabled (1 = disable the request, 0 = enable the request). The IMR is set
to all ones by reset, disabling all interrupt requests. The IMR can be read and written. A write that
sets bit 0 of the IMR forces the other 63 bits to be set, disabling all interrupt sources, and providing
a global mask-all capability.
Freescale Semiconductor
Address
Reset
Reset
31–0
31–1
Bits
Bits
0
W
W
R
R
31
15
0
0
Name
Name
INT
30
14
INT
0
0
Figure 13-2. Interrupt Pending Register Low (IPRL)
29
13
0
0
Interrupt pending. Each bit corresponds to an interrupt source. The corresponding IMRHn
bit determines whether an interrupt condition can generate an interrupt. At every system
clock, the IPRH samples the signal generated by the interrupting source. The
corresponding IPRH bit reflects the state of the interrupt signal even if the corresponding
IMRHn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
Interrupt Pending. Each bit corresponds to an interrupt source. The corresponding IMRLn
bit determines whether an interrupt condition can generate an interrupt. At every system
clock, the IPRL samples the signal generated by the interrupting source. The
corresponding IPRL bit reflects the state of the interrupt signal even if the corresponding
IMRL bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
Reserved, should be cleared.
28
12
0
0
Table 13-4. IPRHn Field Descriptions
Table 13-5. IPRLn Field Descriptions
27
11
0
0
MCF5271 Reference Manual, Rev. 2
26
10
0
0
25
IPSBAR + 0x00_0C04
0
0
9
INT
24
0
0
8
INT
23
Description
Description
0
0
7
22
0
6
0
21
0
0
5
20
0
0
4
Memory Map/Register Definition
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0
0
13-7

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