MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 375

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

a receive BD and finds the E bit = 0, it will poll this BD once more. If the BD = 0 a second time
the FEC will stop reading receive BDs until the driver writes to RDAR.
19.2.5.2 Ethernet Receive Buffer Descriptor (RxBD)
In the RxBD, the user initializes the E and W bits in the first longword and the pointer in second
longword. When the buffer has been DMA’d, the Ethernet controller will modify the E, L, M, BC,
MC, LG, NO, CR, OV, and TR bits and write the length of the used portion of the buffer in the first
longword. The M, BC, MC, LG, NO, CR, OV and TR bits in the first longword of the buffer
descriptor are only modified by the Ethernet controller when the L bit is set.
Freescale Semiconductor
Offset + 0
Offset + 2
Offset + 4
Offset + 6
Offset + 0
Offset + 0
Offset + 0
Offset + 0
Offset + 0
Offset + 0
Word
15
E
RO1
10–9
Bits
14
Table 19-28. Receive Buffer Descriptor Field Definitions
15
14
13
12
11
Figure 19-25. Receive Buffer Descriptor (RxBD)
W
13
Field Name
RO2
RO1
RO2
12
W
—
E
L
11
MCF5271 Reference Manual, Rev. 2
L
Empty. Written by the FEC (=0) and user (=1).
0 The data buffer associated with this BD has been filled with received data,
1 The data buffer associated with this BD is empty, or reception is currently
Receive software ownership. This field is reserved for use by software. This
read/write bit will not be modified by hardware, nor will its value affect
hardware.
Wrap. Written by user.
0 The next buffer descriptor is found in the consecutive location
1 The next buffer descriptor is found at the location defined in ERDSR.
Receive software ownership. This field is reserved for use by software. This
read/write bit will not be modified by hardware, nor will its value affect
hardware.
Last in frame. Written by the FEC.
0 The buffer is not the last in a frame.
1 The buffer is the last in a frame.
Reserved.
or data reception has been aborted due to an error condition. The status
and length fields have been updated as required.
in progress.
10
—
Rx Data Buffer Pointer - A[31:16]
Rx Data Buffer Pointer - A[15:0]
—
9
Data Length
M
8
BC
7
MC
Description
6
LG
5
NO
4
Memory Map/Register Definition
—
3
CR
2
OV
1
TR
0
19-31