MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 5

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Paragraph
Number
1.1
1.2
1.3
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
1.3.5.1
1.3.5.2
1.3.6
1.3.7
1.3.8
1.3.9
1.3.10
1.3.11
1.3.12
1.3.13
1.3.14
1.3.15
1.3.16
1.3.17
1.3.18
1.3.19
1.3.20
1.4
2.1
2.1.1
2.2
2.3
2.3.1
Freescale Semiconductor
MCF5271 Family Configurations................................................................................... 1-1
Block Diagram ................................................................................................................ 1-2
Features ........................................................................................................................... 1-4
Documentation.............................................................................................................. 1-13
Introduction..................................................................................................................... 2-1
Signal Properties Summary ............................................................................................ 2-3
Signal Primary Functions................................................................................................ 2-7
Feature Overview........................................................................................................ 1-4
V2 Core Overview ...................................................................................................... 1-7
Integrated Debug Module ........................................................................................... 1-8
JTAG........................................................................................................................... 1-8
On-chip Memories ...................................................................................................... 1-9
Fast Ethernet Controller (FEC)................................................................................... 1-9
UARTs ...................................................................................................................... 1-10
I
QSPI.......................................................................................................................... 1-10
Cryptography ............................................................................................................ 1-10
DMA Timers (DTIM0-DTIM3) ............................................................................... 1-10
Periodic Interrupt Timers (PIT0-PIT3)..................................................................... 1-10
Software Watchdog Timer........................................................................................ 1-11
Clock Module and Phase Locked Loop (PLL) ......................................................... 1-11
Interrupt Controllers (INTC0, INTC1) ..................................................................... 1-11
DMA Controller........................................................................................................ 1-11
External Interface Module (EIM) ............................................................................. 1-11
SDRAM Controller................................................................................................... 1-12
Reset.......................................................................................................................... 1-12
GPIO ......................................................................................................................... 1-12
Overview..................................................................................................................... 2-1
Reset Signals............................................................................................................... 2-7
2
C Bus...................................................................................................................... 1-10
Cache ...................................................................................................................... 1-9
SRAM ..................................................................................................................... 1-9
MCF5271 Reference Manual, Rev. 2
Signal Descriptions
Contents
Chapter 1
Chapter 2
Overview
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Number
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