MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 42

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Overview
1-6
• Phase Locked Loop (PLL)
• Interrupt Controllers (x2)
• DMA Controller
• External Bus Interface
— Crystal or external oscillator reference
— 8 to 25 MHz reference frequency for normal PLL mode
— 24 to 75 MHz oscillator reference frequency for 1:1 mode (input freq = core freq = 2 ×
— Separate clock output pins
— Support for up to 110 interrupt sources per interrupt controller organized as follows:
— Seven external interrupt signals
— Unique vector number for each interrupt source
— Ability to mask any individual interrupt source or all interrupt sources (global mask-all)
— Support for hardware and software interrupt acknowledge (IACK) cycles
— Combinatorial path to provide wake-up from low power modes
— Four fully programmable channels
— Dual-address transfer support with 8-, 16- and 32-bit data capability along with support
— Source/destination address pointers that can increment or remain constant
— 24-bit byte transfer counter per channel
— Auto-alignment transfers supported for efficient block movement
— Bursting and cycle steal support
— Software-programmable connections between the four DMA channels and the 14 DMA
— Glueless connections to external memory devices (e.g., SRAM, Flash, ROM, etc.)
— SDRAM controller supports 8-, 16-, and 32-bit wide memory devices
— Support for n-1-1-1 burst fetches from page mode Flash
— Glueless interface to SRAM devices with or without byte strobe inputs
— Programmable wait state generator
— 32-bit bidirectional data bus
— 24-bit address bus
— Up to eight chip selects available
CLKOUT)
– 103 fully-programmable interrupt sources
– 7 fixed-level interrupt sources
for 16-byte (4 x 32-bit) burst transfers
requesters in the UARTs (6), 32-bit timers (4), and external logic (4)
MCF5271 Reference Manual, Rev. 2
Freescale Semiconductor