MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 571

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

30.5.3.1 ColdFire BDM Command Format
All ColdFire Family BDM commands include a 16-bit operation word followed by an optional set
of one or more extension words, as shown in
30.5.3.1.1 Extension Words as Required
Some commands require extension words for addresses and/or immediate data. Addresses require
two extension words because only absolute long addressing is permitted. Longword accesses are
forcibly longword-aligned and word accesses are forcibly word-aligned. Immediate data can be 1
or 2 words long. Byte and word data each requires a single extension word and longword data
requires two extension words.
Freescale Semiconductor
15
15–10
Bits
7–6
5–4
2–0
9
8
3
14
Operation
Register
Op Size
Operation
13
Name
R/W
A/D
—
—
12
Specifies the command. These values are listed in
Reserved, should be cleared.
Direction of operand transfer.
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.
Operand data size for sized operations. Addresses are expressed as 32-bit absolute
values. Note that a command performing a byte-sized memory read leaves the upper 8
bits of the response data undefined. Referenced data is returned in the lower 8 bits of the
response.
Reserved, should be cleared.
Address/data. Determines whether the register field specifies a data or address register.
0 Indicates a data register.
1 Indicates an address register.
Contains the register number in commands that operate on processor registers.
11
Figure 30-15. BDM Command Format
Table 30-19. BDM Field Descriptions
10
MCF5271 Reference Manual, Rev. 2
00
01
10
11
0
9
Extension Word(s)
R/W
Operand Size
8
Figure
Longword
Reserved
Word
Byte
7
Op Size
30-15.
Description
6
0
5
Table
Bit Values
0
4
16 bits
32 bits
8 bits
30-18.
—
A/D
Background Debug Mode (BDM)
3
2
Register
1
0
30-21