MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 499

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

26.2.3
The MDCR will always read zeros. The bits in the command register are used for software control
of hashing and resetting.
Freescale Semiconductor
Address
Address
Reset
Reset
Reset
Reset
31–1
Bits
W
W
0
W
W
R
R
R
R
31
15
31
15
0
0
0
0
0
0
0
0
MDHA Command Register (MDCMR)
Name
30
14
30
14
0
0
0
0
0
0
0
0
—
IE
Figure 26-4. MDHA Command Register (MDCMR)
29
13
29
13
0
0
0
0
0
0
0
0
Figure 26-3. MDHA Control Register (MDCR)
Reserved
Interrupt enable. Enables/Disables interrupts from the MDHA module.
0 Disable interrupt
1 Enable interrupt
28
12
28
12
0
0
0
0
0
0
0
0
Table 26-4. MDCR Field Descriptions
27
11
27
11
0
0
0
0
0
0
0
0
MCF5271 Reference Manual, Rev. 2
26
10
26
10
0
0
0
0
0
0
0
0
25
IPSBAR + 0x19_0004
25
IPSBAR + 0x19_0008
0
0
0
0
0
0
0
0
9
9
24
24
0
0
0
0
0
0
0
0
8
8
23
Description
23
0
0
0
0
0
0
0
0
7
7
22
22
0
0
0
1
0
0
0
1
6
6
21
21
0
0
0
0
0
0
0
0
5
5
20
20
0
0
4
0
0
0
0
4
0
0
Memory Map/Register Definition
GO
19
19
0
0
0
0
0
0
0
0
3
3
CI
18
18
0
0
0
0
0
0
0
0
2
2
RI
17
17
0
0
0
0
0
0
0
0
1
1
SWR
16
IE
16
0
0
0
0
0
0
0
0
0
26-7