MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 315

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Figure 17-14
peripheral or memory more time to return read data. This figure follows the same execution as a
zero-wait state read burst with the exception of an added wait state.
Figure 17-15
executes a basic read cycle while determining that a line is being transferred. The external device
uses fast termination for subsequent transfers.
Freescale Semiconductor
.
A[31:0], TSIZ[1:0]
CSn, BSn, OE
CSn, BSn, OE
TSIZ[1:0]
CLKOUT
CLKOUT
D[31:0]
A[31:0]
D[31:0]
R/W
R/W
TIP
shows a burst-inhibited line read access with fast termination. The external device
TIP
shows a line access read with one wait state programmed in CSCRn to give the
TS
TS
TA
TA
Figure 17-14. Line Read Burst (3-2-2-2), External Termination
Figure 17-13. Line Read Burst (2-1-1-1), Internal Termination
S0 S1
S0
S2 S3
S1
MCF5271 Reference Manual, Rev. 2
WS
S2
Read
S3
Read
S4 S5
S4
WS
Read
S5
Read
S6
S6
S7
Read
S7
WS
S8
Read
S8
S9
Read
S9
S10
WS
Read
S11 S12 S13
S10
Data Transfer Operation
S11 S20 S13
17-13