MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 448

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

UART Modules
24.3.4
The UCSRs select an external clock on the DTIN input (divided by 1 or 16) or a prescaled internal
bus clock as the clocking source for the transmitter and receiver. See
“Transmitter/Receiver Clock
sources. To use the internal bus clock for both, set UCSRn to 0xDD.
24.3.5
The UCRs, shown in
do not conflict can be specified in a single write to a UCRn. For example,
and
Table 24-7
Receiver Operating
24-10
ENABLE TRANSMITTER
Bits
7–4
3–0
describes UCRn fields and commands. Examples in
UART Clock Select Registers (UCSRn)
UART Command Registers (UCRn)
Name
RCS
TCS
Address
Address
Reset
Reset
Modes,” show how these commands are used.
Figure 24-6. UART Clock Select Register (UCSRn)
Figure
W
W
R
R
Figure 24-7. UART Command Register (UCRn)
Receiver clock select. Selects the clock source for the receiver channel.
1101 Prescaled internal bus clock
1110 DTIN divided by 16
1111 DTIN
Transmitter clock select. Selects the clock source for the transmitter channel.
1101 Prescaled internal bus clock
1110 DTIN divided by 16
1111 DTIN
0
cannot be specified in one command.
0
0
7
7
Table 24-6. UCSRn Field Descriptions
24-7, supply commands to the UART. Only multiple commands that
IPSBAR + 0x0204 (UCSR0); IPSBAR + 0x0244 (UCSR1);
Source.” The transmitter and receiver can use different clock
IPSBAR + I0x0208 (UCR0); IPSBAR + 0x0248 (UCR1);
MCF5271 Reference Manual, Rev. 2
0
0
6
6
RCS
MISC
0
0
5
5
IPSBAR + 0x0284 (UCSR2)
IPSBAR + 0x0288 (UCR2)
0
0
4
4
Description
0
0
3
3
TC
2
0
2
0
TCS
Section 24.4.2, “Transmitter and
0
0
1
1
RC
0
0
0
0
RESET TRANSMITTER
Freescale Semiconductor
Section 24.4.1,