pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 82

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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4.0 Embedded Controller Modules
I/O Zone Configuration Register (IOCFG)
The IOCFG register controls the configuration of the I/O zone. On reset, it is initialized to 069F
Location: 00 F982
Type:
Bit
Name
Reset
15-10 Reserved.
2-0
4-3
6-5
Bit
7
8
9
WAIT. This field sets the number of TIW clock cycles that extend the bus cycle.
Bits
2 1 0 Number
0 0 0: None
0 0 1: One
0 1 0: Two
0 1 1: Three
1 0 0: Four
1 0 1: Five
1 1 0: Six
1 1 1: Seven (default)
HOLD. This field sets the number of T
Bits
4 3
0 0:
0 1:
1 0:
1 1:
Reserved.
BW (Bus Width). This bit sets the external bus width used for the I/O zone. It is initialized during reset to its
default value.
0: 8-bit bus
1: 16-bit bus (default)
Reserved.
IPST (Idle After Bus Cycle). This bit determines if an idle cycle follows the current bus cycle when the next bus
cycle is in a different zone.
0: No idle cycle inserted
1: Idle cycle inserted (default)
R/W
15
0
16
Number
None
One
Two
Three (default)
14
0
Reserved
13
0
12
0
11
0
hold
10
(Continued)
1
clock cycles.
IPST Res
9
1
Description
82
8
0
BW
7
1
Reserved
6
0
5
0
4
1
HOLD
16
.
3
1
2
1
WAIT
1
1
Revision 1.2
0
1