pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 323

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pc87591l-n05

Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
Revision 1.2
Host-Controlled Modules and Host Interface
The Valid RAM and Timer bit (VRT) in CRD register indicates the state of non-interrupted power supplied to the PC87591L-
N05 RTC module. VRT is cleared once V
should read this bit as part of the startup routine, before using the timer or the CMOS-RAM contents. In case a value of 0 is
read, the RAM and timer must be initialized before use. The VRT bit is set once read.
Figure 111 shows typical battery current consumption during battery-backed operation; Figure 112 shows typical battery
current consumption during normal operation.
6.2.10 System Bus Lockout
During power on or power off, spurious bus transactions from the host may occur. To protect the RTC internal registers from
corruption, all inputs are automatically locked out. The lockout condition is asserted when V
6.2.11 Power-Up Detection
When system power is restored after a power failure or power off state (V
of 62 ms (minimum) to 125 ms (maximum) after the RTC switches from battery to system power.
3.3V - 3.6V
V
V
PP2CC
CC2PP
V
V
BAT
PP
Figure 111. Typical Battery Current During Battery-Backed Power Mode
Figure 112. Typical Battery Current During Normal Operation Mode
V
Note: Battery voltage in this test is 3.0V.
V
CC
PP
uses V
Figure 110. V
BAT
PP
power is lost, i.e., when V
I
I
BAT
BAT
PP
0.20
0.15
0.10
0.05
1.0
0.9
0.8
0.7
( A)
( A)
Generation Using V
V
PP
V
323
uses V
BAT
2.4 3.0 3.6
3.0 3.3 3.6
(Continued)
CC
CC
and V
CC
=0), the lockout condition continues for a delay
V
CC
BAT (V)
BAT
V
or V
PP
V
are both below V
V
CC
uses V
CC
BAT
(V)
BAT
CC
V
PP
is lower than V
time
LOWBAT.
The host code
CCON
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.

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