pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 163
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
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Revision 1.2
4.0 Embedded Controller Modules
Timer and Watchdog Clock Pre-Scaler Register (TWCP)
The TWCP register is a byte-wide, read/write register. It defines the pre-scale ratio of the input clock and generates the T0IN
clock. On reset, the non-reserved bits of TWCP are initialized to 0.
Location: 00 FEE2
Type:
Bit
Name
Reset
7-6
Bit
2-0
7-3
Bit
3
4
5
LWDCNT.
0: Enables write to WDCNT register (default)
1: Any data written to it is ignored and reading from it returns unpredictable values
Once LWDCNT is set, it can only be cleared by reset. When WDSDME bit is cleared, touch operations (i.e.,
writing to WDCNT register) may be performed when LWDCNT bit is either 0 or 1.
WDCT0I.
0: Selects T0OUT clock as the watchdog clock (default)
1: Selects T0IN as the input clock
The hardware clock source selection overrides this clock selection.
WDSDME. This bit selects the watchdog touch mechanism
0: Disables the watchdog service using WDSDM register. In this case, the watchdog should be serviced by writing
1: Selects the use of data match using the WDSDM mechanism.
Reserved.
MDIV. Defines the pre-scale ratio of the input clock. The pre-scale ratio is 2
the range of 0-5, providing a pre-scale ratio of 1 to 32.
MDIV allowed values:
Bits
2 1 0
0 0 0: 1:1 (default)
0 0 1: 1:2
0 1 0: 1:4
0 1 1: 1:8
1 0 0: 1:16
1 0 1
Other
Reserved.
R/W
a value to WDCNT register. When this bit is cleared, write operations to WDSDM are ignored (default).
16
Clock Ratio
1:32
Reserved
7
0
6
0
Reserved
5
0
(Continued)
Description
Description
163
4
0
3
0
MDIV
2
0
. The value of MDIV must be in
MDIV
1
0
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0
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