pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 399

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
C. Booter Program
C.5
A special erase (external flash erase) can be performed by writing a special erase function, loading it to the RAM and exe-
cuting it via the JTAG or RS-232 debugging channels.
Note: The same procedure can also be used for other operations on the external flash, such as reading the flash device
C.6
The Booter contains TMON libraries and can be used for debugging. If the header is valid, the user can force Recovery mode
at run time.
The Booter contains all the entry addresses required for the dispatch table, which must be implemented in the EC firmware
to allow debugging. The entry address list is:
All these values must be present in the dispatch table at the specific entry places to permit debugging. The USART1 interrupt
handler is not needed when debugging via the JTAG channel (JTAG channel is enabled only in OBD mode).
Note: For Large model, same values are used in 32-bit format.
To allow debugging via the RS-232 channel, the USART1 interrupt handler must be present with all the other entries in the
dispatch table, and the USART1 Enable bit (bit 1 in Config field in the main header) must be set (USART1 channel is enabled
in both OBD and IRE modes). The RS-232 debugging channel must be configured to work at 38400 BPS baud rate. (See
the CompactRISC Debugger Communication Interface (DbgCom) User Guide).
To force Recovery mode at run time, an ABORT signal must be sent via the debugging channel. The Booter enters Recovery
mode, while keeping the core status, and waits for debug commands.
Note: The user should not clear GTMON bit (bit 7 in MCFG register) nor modify byte at address F7FF16 in the RAM in
Debugging Limitations
When debugging with the Booter, the following limitations must be taken into account:
• NmiHandler (entry number 1) Address value: 0006
• SvcHandler (entry number 5) Address value: 000A
• DvzHandler (entry number 6) Address value: 000E
• FlgHandler (entry number 7) Address value: 0012
• BptHandler (entry number 8) Address value: 0016
• TrcHandler (entry number 9) Address value: 001A
• UndHandler (entry number 10) Address value: 001E
• DbgHandler (entry number 14) Address value: 0022
• IseHandler (entry number 15) Address value: 0026
• USART1 interrupt handler (entry number 34) Address value: 002A
• Booter memory resources must not be overwritten (Offset F6A0
• Software breakpoints are not allowed on code placed in the external flash.
• To use the JTAG interface, the chip must be in OBD mode.
• When working with the RS-232 channel, the HFCG frequency must not be changed and core interrupts must always
Where:
— Source is the source pointer address (four bytes sent via registers r2 and r3)
— Destination is the destination pointer address (four bytes sent via registers r4 and r5)
— Size is the size in bytes of the memory block to copy (two bytes sent via the stack at the address: 0(sp))
Before attempting to perform external memory writes, load the function into RAM via either the JTAG or RS-232 debug-
ging channel.
set F400
be enabled (PSR I and E bits).
EXTERNAL FLASH ERASE
and manufacturer ID etc.
DEBUGGING CAPABILITIES OF THE BOOTER
order to allow forcing recovery mode at run time.
void Rom_Write(
16
);
to F7FF
16
).
(Continued)
__far unsigned
__far unsigned
unsigned
16
16
16
16
16
16
16
.
.
16
16
.
.
.
.
.
.
399
char* Source,
char* Destination,
short Size
16
to F7FF
16
.
16
in all modes, except Generic mode: off-
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