pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 5

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
Revision Record
March 16, 2003
July 17, 2003
April 1, 2004
Revision Date
Revision 1.0 Preliminary
Revision 1.1 Preliminary, second release
Revision 1.2 Preliminary, third release. List of changes:
Status
- In the entire document:
- In the entire document changed “security” to “protection”.
- Added clarification on XOR-Tree use.
- PTWRL, PTWRH and PNMR registers moved to “System Configuration Registers”.
- To PTWRL and PTWRH registers, added updating conditions (HOSTWAIT bit).
- In “Factory Parameters”, changed RevisionCode Interpretation.
- Updated the “Power Supply Current Consumption” for I
- Added “guaranteed by characterization” to V
- Updated “Voltage Measurement” characteristics for: “Offset Error”, “Gain Error”,
- Added clarification for MFT16: “Slow Speed Clock” is “LFCLK”.
- Added clarification: “Input Clock” for TWD is “LFCLK”.
- Added specification for V
- Separated RI timing from RING timing; added new values (t
- Updated USART timing.
- Changed the “Header 2”, “Reserved” area at offset 21 to 3 bytes.
- Replaced TBD in the current consumption in the “Power Supply” features.
- Replaced TBD in the input capacitance of “Voltage Inputs”, “Temperature Inputs” and
- Replaced TBD in the “Package Thermal Information” for 176-Ball FBGA.
- In GPIO pin description, corrected pin numbers of IOPJ7-2.
- In the “Register List”, corrected the layout of PEWPU register.
- In the SZCFGn register, added clarification to WAIT, HOLD and BRE bits.
- In the “Register List”, removed duplicate TnCNT2 register.
- Corrected the reset value of DCRi (i = 0-7) registers.
- Added clarification for ACB: ACBnCTL1 register is cleared in Idle mode.
- Added clarification to CFGAE bit in CRSMAE register.
- Corrected type (WO) of WK_STATE register.
- Corrected the conditions for RTC oscillator active/disabled.
- Corrected the value of t
- In “LPC Signals Timing”, added minimum value for t
- Corrected the description of the calculation algorithm for “Checksum” and “XOR
- Corrected the Booter memory resources limitations.
- Removed PC97591L device
- Changed PC97591V to PC87591L-N05.
“Integral Non-linearity Error” and “Differential Non-linearity Error”.
“ACM Inputs”.
RESET1-2 from “Inputs” timing diagram.
Checksum” in “Header 2” of the Booter program.
5
LW
DD
in “Debugger Interface Timing”.
, V
CC
and AV
Comments
CC
Power Off Voltage (V
BATDTC
.
DD
VAL
and I
LR
and removed LPCPD,
and t
CC
OFF
.
HR
).
) for RING.
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