pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 109

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
4.0 Embedded Controller Modules
Pending Clear Register (WKPCL1)
Byte-wide write-only register that controls the clearing (0) of the pending bits associated with the WUI10 through WUI17 inputs. This
avoids potential hardware/software collisions during read-modify-write operations. The WKPCL1 register format is shown below:
Location: 00 FFCA
Type:
Pending Clear Register (WKPCL2)
Controls the clearing (0) of the pending bits associated with the WUI20 through WUI27 inputs. For a detailed description of
the register see, the description of the WKPCL1 register, above.
Location: 00 FFCE
Type:
Pending Clear Register (WKPCL3)
Controls the clearing (0) of the pending bits associated with the WUI30 through WUI37 inputs. For a detailed description of
the register, see the description of the WKPCL1 register, above.
Location: 00 FFD2
Type:
Pending Clear Register (WKPCL4)
Controls the clearing (0) of the pending bits associated with the WUI40 through WUI47 inputs. For a detailed description of
the register, see the description of the WKPCL1 register, above.
Location: 00 FFD6
Type:
4.4.4
1. When changing an edge select, perform the following steps to avoid a spurious wake-up condition, which may occur as
2. The correct use of the Multi-Input Wake-Up circuit, which avoids false triggering of a wake-up condition, requires the
3. On Reset, the WKEDGx registers are configured to select positive edge sensitivity for all wake-up inputs. To change the edge
Bit
Name
7-0
Bit
a result of the edge change:
a. Clear the associated WKENxx bit.
b. Select the required the edge in the WKEDGx register.
c. Clear the associated WKPDxx bit.
d. Re-enable the associated WKENxx bit.
following sequence of actions. Use the same procedure following a Reset since the wake-up inputs are left floating, pro-
ducing unknown data on the MIWU input signals.
a. If the input originates from an I/O port, write to the port alternate function and, if required, direction register to set the
b. Clear the WKENAx register or, if a WKOxx interrupt is used, disable the interrupt via the ICU.
c. Write the WKEDGx register to select the desired type of edge sensitivity for each of the pins used.
d. Clear the WKPNDx register to cancel any pending bits.
e. Either set the WKENxx bits associated with the pins to be used, thus enabling them for the wake-up/interrupt function,
sensitivity of an input signal while preventing the false triggering of a wake-up/interrupt condition, use the following procedure.
a. Clear the WKENxx bit associated with the WUIxx input to disable that input.
b. Write to the WKEDGx register to select the new type of edge sensitivity for the specific input.
c. Clear the WKPDxx bit associated with the WUIxx input.
d. Set the WKENxx bit associated with the WUIxx input to re-enable it.
pin to interrupt inputs.
or re-enable the interrupt via the ICU.
Usage Hints
Clear Pending Flag. If a 1 is written to any bit, the associated pending flag located in WKPND1 is cleared (0).
Writing a 0 to any bit leaves the value of the corresponding pending flag unchanged.
WO
WO
WO
WO
16
16
16
16
7
6
5
(Continued)
WKCL17-WKCL10
Description
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