pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 214

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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4.0 Embedded Controller Modules
When the new HFCGML, HFCGMH and HFCGN register values are loaded, the HFCG holds OSCCLK low until the frequen-
cy multiplier locks onto the target frequency and the new frequency stabilizes. The core domain clock is also low during this
time. This automatic locking process can take several milliseconds to complete.
Frequencies within the range of 4 MHz to 20 MHz are valid. See Table 1 for a sampling of selected frequencies and their
corresponding M and N values.
Fast Clock Setting. This operation enables changing the clock frequency while in PMC Enabled SuperI/O Disabled state
or switching from SuperI/O Enabled PMC Enabled state to PMC Enabled SuperI/O Disabled state.
The HFCG maintains an internal I variable. The I variable is defined by two byte-wide registers: HFCGIL and HFCGIH. If
new M and N values are loaded, the frequency multiplier automatically searches for the I value needed to lock onto the target
frequency. The locking process can take several milliseconds to complete. The I variable can be recorded for a given M and
N set of values and used later to reduce the time needed for frequency locking.
To record the I value:
1. Read the low byte of the I value via HFCGIL register.
2. Check if IVLID bit in HFCGCTRL1 register is set to 0. If yes, repeat steps 1 and 2.
3. Read the upper six bits of the I value via HFCGIH register.
To fast load a new setting, load the M and N values and the corresponding I value. Then set FAST bit in HFCGCTRL1 reg-
ister to 1. The FAST command loads (simultaneously) the new values into the frequency multiplier and loads the program-
mable pre-scaler with 0 (set to a divide by 1). Note that HFCGP register does not change its contents. The frequency
multiplier quickly locks onto the target frequency without searching for a new I value.
To fast set a new clock frequency:
1. Write the N value to HFCGN register.
2. Write the low byte of the M value to HFCGML register.
3. Write the upper bits of the M value to HFCGMH register.
4. Write the low byte of the I value to HFCGIL register.
5. Write the upper six bits of the I value to HFCGIH register.
6. Set FAST bit in HFCGCTRL1 register to 1.
Changes in temperature or voltage may cause variations in the value of I for a given output frequency. If these changes
occur in the interval between recording I and its use, the output frequency generated following a fast frequency setting may
differ from the target frequency. However, after some time, the output frequency converges to the desired frequency.
Frequency
4.00 (default)
1. This value is referred to as t
specifications.
10.00
12.00
14.00
16.00
18.00
20.00
Table 1. Frequencies of Selected Settings
5.00
6.00
7.00
8.00
9.00
1
(MHz)
(Continued)
HFCGMH
0A
0A
0A
03
03
03
07
11
19
11
11
17
16
16
16
16
16
16
16
16
16
16
16
16
214
HFCGML
CLKINTnom
CF
7C
B9
B9
2A
D6
92
92
81
07
29
29
16
16
16
16
16
16
16
16
16
16
16
16
in the AC
HFCGN
0B
0A
0C
0F
0A
08
06
05
09
09
09
08
16
16
16
16
16
16
16
16
16
16
16
16
Revision 1.2