pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 61

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pc87591l-n05

Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
Revision 1.2
3.0 Power, Reset and Clocks
3.2
The PC87591L-N05 has several input reset types:
• V
• V
• Warm reset
• Watchdog and Debugger Interface resets:
• Host Domain reset
Activated when either V
Activated when V
Activated on RESET1 input falling edge.
— Watchdog reset
— Debugger Interface reset
This is divided into two sub-groups: Host Domain Hardware and Host Domain Software reset. Combinations consist-
ing of the flowing events are used to trigger these reset operations:
— RESET1 active
— When V
— On V
— A Software reset triggered by a write of 1 to bit 1 of SIOCF1 register in the SuperI/O Configuration registers; see
PP
CC
RESET SOURCES AND TYPES
Activated on request from the TWD module (watchdog signal is asserted); see Section 4.10 on page 160.
Activated on request from the Debugger Interface module used during debug and flash updates; see Section 4.19
on page 221.
Section 6.1.8 on page 306
Power-Up reset (for V
Power-Up reset
DD
DD
power-up
V
is active, RESET2 is active
IN
ZL
Analog Ground Plane
Analog
Power
(3.3V)
CC
C1
22
is powered up.
F
CC
10-100
+
VOUT0
VOUT3
PP
L
0.1
or V
VIN0
1
VIN9
F
Figure 9. PC87591L-N05 Power Supply Connection
supplied functions only)
C2
BAT
H
is powered up after both have been off.
AD0
AD9
AV
AGND
DA0
DA3
(Continued)
PC87591L-N05
CC
KBSIN0
KBSIN7
V
GND
V
CORF
V
V
BAT
DD
CC
61
Suspend
Digital
KBVIN0
KBVIN7
Power
(3.3V)
C3 0.1
Digital Ground Plane
F
+
C4
C5
22
Power
Digital
(3.3V)
F
Host
0.1
F
+
Backup
0.1
C7
F
C6
22
F
Power
BAT
KBV
C8
1
F
IN
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