pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 27

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

1.0 Introduction
(Continued)
Internal keyboard scanning is supported by 16 open-drain output signals and eight input signals. Switch-based keyboard
matrices are supported with CMOS Schmitt trigger inputs with internal pull-up resistors. For power efficiency, the inputs in-
clude an interrupt and a wake-up capability, so that pressing/releasing keys may be identified without scanning the keyboard
matrix in either Active, Power Save or Idle modes. The keyboard interrupt is controlled by the MIWU.
The PS/2 Interface enables interface with industry-standard, PS/2-compatible keyboard, mouse and other pointing devices.
The PC87591L-N05 supports up to four PS/2 devices via its dedicated 4-channel PS/2 interface module. Each channel has
two quasi-bidirectional signals. The symmetric structure of the channels enables software-controlled interchanging of devic-
es to channels.
The PC87591L-N05 includes a hardware accelerator, which allows the PS/2 channels to be controlled with minimal software
overhead. It also eliminates the sensitivity to interrupt latency that characterized traditional solutions.
The ACB Interface is a two-wire serial interface compatible with the ACCESS.bus physical layer. It is also compatible with
2
Intel’s SMBus and Philips’ I
C. This module can serve as a bus master or slave and performs both transmit or receive op-
erations. As a slave, it can respond to two assigned addresses, a global call address and an SMBus ARP address.
The PC87591L-N05 includes two ACB Interface modules, which allows operation on two isolated buses in the system.
The USART (Universal Synchronous Asynchronous Receiver Transmitter) gives full-duplex support for a wide range of
software programmable baud rates and data formats. It handles automatic parity generation and several error detection
schemes. It also supports DMA transfers, which provides fast processor-independent receive and transmit. The PC87591L-
N05 includes two USART interfaces.
The MFT16 (Multi-Function 16-Bit Timer) contains two 16-bit timers with a range of operation modes. These timers can op-
erate, using several clock sources, in PWM, Capture or Counter mode to satisfy a wide range of application requirements.
The PC87591L-N05 includes two MFT16 modules, each of which may be assigned functions and configured independently.
The TWD (Timer and Watchdog) module has a 16-bit periodic interrupt timer that can be programed to generate interrupts
at pre-defined intervals and an 8-bit watchdog timer that can reset the PC87591L-N05 whenever the software loses control
of the processor.
The periodic timer is typically used as a system tick timer. This timer is fed by the 32.768 KHz clock. Thus its counting is not
impacted by the setting of the HFCG, and it may continue to operate even in Idle mode. This enables it to serve as a periodic
wake-up source during Idle mode.
The PWM (Pulse Width Modulator) module provides eight modulated output signals. All of these signals have the same (pro-
grammable) frequency and each signal has an individually programmable 8/16-bit duty cycle.
The ADC (Analog to Digital Converter) provides the PC87591L-N05 with an accurate means for measuring slowly changing
voltages and temperature. The ADC module can measure up to ten external and four internal voltages with 8-bit resolution
over a voltage range of 0 to 2.97V. It can measure temperature using thermistors.
The DAC (Digital to Analog Converter) has four channels of voltage output. Each of the four DAC channels has an 8-bit res-
olution with a full output range from AGND to AV
. The DAC provides a settling time of about 1 s on a 50 pF load.
CC
The Debugger Interface module provides a JTAG-based interface to a remote, host-based debugger. This interface en-
ables device debugging while in OBD environment (i.e., in the final production board) or in DEV environment once in the
development system.
1.3.5
Host-Controller Interface Modules
Chapter 5 on page 242 describes a set of modules that resides in the boundary between the host-controlled functions and
the core-controlled functions. These modules are used for message communication, data exchange, memory access and
generating power management events to the host. Chapter 5 also discusses the mechanism that enables the core to access
the host-controlled peripherals.
The Keyboard Controller, Power Management module has three channels that are available for keyboard and power
management (EC)-related host-controller communication.
The keyboard and mouse data channel (i.e., host legacy I/O addresses 60
and 64
) is compatible with the legacy inter-
16
16
face of keyboard controllers. It may be used with polling or interrupts. For use with interrupts, the module can generate the
two legacy IRQ signals: IRQ1 and IRQ12. In addition, the PC87591L-N05 generates the gate A20 control signal (GA20 pin)
and a soft reset signal (KBRST pin) to the host. Optionally, this KBRST reset signal can be used to prevent the host from
accessing the shared flash when the PC87591L-N05 is not ready to perform shared memory access (i.e., during PC87591L-
N05 boot-up). See “GA20 Pin Functionality” on page 285 and “Host Keyboard Fast Reset” on page 284 for details).
The PC87591L-N05 supports two Power Management channels, in compliance with ACPI requirements for Embedded Con-
troller (EC) interface. This enables the PC87591L-N05 to implement an EC interface that operates in either shared or private
modes. The number of Power Management channels in use and the addresses they respond to (i.e., legacy host I/O ad-
dresses 62
and 66
) are configured in the Host Controlled Functions configuration space. These channels may generate
16
16
Revision 1.2
27
www.national.com