pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet

pc87591l-n05

Manufacturer Part Number

pc87591l-n05

Description

Lpc Mobile Embedded Controller

Manufacturer

National Semiconductor Corporation

Datasheet

1.PC87591L-N05.pdf (401 pages)

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PC87591L-N05

LPC Mobile Embedded Controller

General Description

The National Semiconductor PC87591L-N05 is a highly in-

tegrated embedded controller with an embedded RISC core

and integrated advanced functions. This device is targeted

for a wide range of portable applications that use the Low

Pin Count (LPC) interface.

In this datasheet, references to the PC87591L-N05 include

the PC87591L-VPCN05 and PC87591L-SLCN05.

The PC87591L-N05 incorporates the National CompactRISC

CR16B core (a high-performance 16-bit RISC processor),

on-chip ROM and RAM memories, system support func-

tions and a Bus Interface Unit (BIU) that directly interfaces

with external memory (such as flash) and I/O devices.

System support functions include: watchdog, PWM, timers,

interrupt control, General-Purpose I/O (GPIO) with internal

keyboard matrix scanning, PS/2

interface and high-accuracy analog-to-digital (ADC) and

digital-to-analog (DAC) converters for battery charging, sys-

tem control, system health monitoring and analog controls.

The PC87591L-N05 interfaces with the host via an LPC inter-

face that provides the host with access to the following: Key-

board and embedded controller interface channels, integrated

functions, Real-Time Clock (RTC) and BIOS firmware.

Block Diagram

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All other brand or product names are trademarks or registered trademarks of their respective holders.

Host

Controlled

Functions

Internal Bus

LPC

KBC + PM

I/F

Host I/F

LPC Bus I/F

Serial

IRQ

32.768 KHz

MSWC

RTC

Interface, ACCESS.bus

SMI

CR Access

CLK

HFCG

Bridge

Core Bus

I/F Functions

Reset &

PMC

Config

Peripheral Bus

ICU

Shared mem.

+ Protection

MIWU

CR16B Core

KBSCAN +

ACM

Like other members of the National SuperI/O family, the

PC87591L-N05 is PC01 and ACPI compliant.

Outstanding Features

Debugger

Adapter

JTAG

Bus

Host interface, based on Intel’s LPC Interface

Speciﬁcation Revision 1.1, August 2002

PC01 Rev 1.0, and ACPI 2.0 compliant

16-bit RISC core, with 2 Mbytes address space,

running at up to 20 MHz

JTAG-based debugger interface

Shared BIOS ﬂash memory (external)

92 GPIO ports (including keyboard scanning) with a

variety of wake-up events

Software- and hardware-controlled clock throttling, and

extremely low current consumption in Idle mode

176-pin LQFP and FBGA packages

I/F

GPIO

Processing

PS/2

RAM

I/F

Unit

ACB

Memory

(X4)

MFT16

(X2)

Timer +

WDG

ROM

Peripherals

PWM

ADC

DAC

PRELIMINARY

DMA

USART

(X2)

Memory + I/O

External

BIU

Revision 1.2

April 2004

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