pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 263
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
- Current page: 263 of 401
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Revision 1.2
5.0 Host Controller Interface Modules
Access restrictions are based on the contents of the host-controlled and core-controlled access protection registers. The
access protection logic may prevent read and/or write access to addresses in the core address space. The core-controlled
register setting should always prevent host access to addresses that are not in the core domain’s expansion memory space.
Note that the resulting memory space is not continuous.
In DEV environment, the value of MBTA may be changed for ease of software development. The memory space between
00 E000
Figure 90 shows the address translation scheme for shared memory transactions.
• For allowed addresses, the SM_Host_Address is translated to a core address using the following equation
• The CR_Space_Address[20-0] is checked against the Host-Controlled Access Protection registers, the Core-Con-
Bus
LPC
(a 21-bit address in the core address space is generated by adding the host memory address to the MBTA):
MBTA is the size of the PC87591L-N05 on-chip ROM memory (4 Kbytes only), as defined in the Shared Memory Main
Block Top Address register (SMCTA). This value is defined on reset to indicate the available memory size. In DEV en-
vironment, this value may be changed to allow code development for other memory sizes.
trolled Override Protection registers and general address space access limitations (i.e., space not mapped to the ex-
pansion memory).
16
Reset or
Core Write
CR_Space_Address[20-0] = (21 least significant bits)(SM_Host_Address + MBTA)
and 00 FFFF
FWH ID Check
32
Translation
Address
Memory R/W
Address
16
Figure 90. Address Translation Mechanism for Extended Memory
is not accessible by the host.
32
IMA0-3
MBTA
win_size_bits
‘1’
‘1’
17-31
0-(win_size_bits
0-16
Memory Address
0-31
Transaction Type &
0-31
0-31
Indirect Memory Access
386 BIOS Range
Decoders
Legacy & Extended
BIOS Range
31
User Def. Space
(Continued)
263
1)
SM_Host_Address
Host-Controlled
Protection
Registers
Access
+
0-20
Protection
Access
Logic
Core-Controlled
MBTA
Protection
Registers
Override
0-20
www.national.com
Core Bus
Address
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