pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 23

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pc87591l-n05

Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
Revision 1.2
1.0 Introduction
1.1
This document describes the PC87591L-N05 architecture and device specifications. It is organized as follows:
Chapter 1 -Introduction, provides an overview of PC87591L-N05 modules, system connections, operating modes and con-
Chapter 2 -Signal/Pin Description and Configuration, lists the PC87591L-N05 pins and describes their functions and multi-
Chapter 3 -Power, Reset and Clocks, describes the PC87591L-N05 power supplies, clock scheme and reset sequence.
Chapter 4 -Embedded Controller Modules, describes the modules that comprise the CompactRISC core peripherals.
Chapter 5 -Host Controller Interface Modules, describes the modules and functions that interface core operation with the
Chapter 6 - Host-Controlled Modules and Host Interface, defines the configuration and control functions.
Chapter 7 -Device Specifications, defines the AC, DC and analog characteristics of the PC87591L-N05.
Appendix A - Summary of Registers, provides a composite listing of all relevant data on core domain registers and sum-
Appendix B - This section includes directions for the software to handle some predetermined hardware interfaces and pro-
Appendix C - This section describes the Booter program.
1.2
The PC87591L-N05 is a highly integrated, embedded controller with an embedded RISC core and system functions. Target-
ed for a wide range of portable applications that use the Low Pin Count (LPC) interface, it also features a protection system
and host BIOS firmware.
1.2.1
Figure 1 shows the system connections of the PC87591L-N05 in a typical mobile PC application. The PC87591L-N05 re-
quires few, if any, system glue elements. For a typical application, the PC87591L-N05 includes all required memory and pe-
ripherals on-chip. For more complex applications, it allows simple low-cost expansion, using its bus. Some of the features
illustrated are mutually exclusive, depending on pin functions.
The major elements of the PC87591L-N05 are:
In addition to the wide range of internal peripherals, the PC87591L-N05 provides hooks so that the system can be expanded
in an easy and cost-effective manner, as follows:
1.2.2
The PC87591L-N05 has an advanced power management scheme controlled by the host and/or the PC87591L-N05 firm-
ware. The supported SuperI/O functions may be controlled directly by the host, using ACPI compliant schemes. The EC may
also interface with the host via one or two communication channels. Power Management events are available for ACPI-com-
pliant operation with the respective parts of the host chipset.
The PC87591L-N05 is designed to operate as the embedded controller of an ACPI-compliant system. It is equipped with var-
ious system power monitor and control functions and advanced means to control its own power consumption and power
modes.
ACPI-compliant wake-up and sleep control are integrated into the PC87591L-N05. These functions are powered by V
The Keyboard Controller and the EC functions (core and associated peripherals) are powered by V
as long as the system has a power source (e.g., main battery or outlet). Using V
and control the system even when the host processor is turned off. To support this, the PC87591L-N05 is equipped with
advanced means to control its power consumption: software controlled clock frequency throttling, the ability to disable mod-
• Embedded Controller (EC) functions, which include: PS/2 devices, keyboard matrix, ACCESS.bus, timers, D/A and
• Host Processor interface based on the LPC bus and additional signals for interrupts and system power management
• Power Supplies for Host interface functions, EC and backup battery
• Clocks, using a 32.768 KHz crystal and optional clock output
• Strap inputs to initialize the PC87591L-N05 to different operation modes
• I/O expansion to support additional I/O port pins, using low-cost, standard 74HCxx devices or ASICs.
• On-chip memories may be expanded to interface with external RAM, flash or ROM devices.
A/D converters and GPIO pins that can be assigned to various functions, as needed. External memory and peripheral
devices may be added to extend the functionality of the on-chip resources.
DOCUMENT ORGANIZATION
GENERAL DESCRIPTION
System Connections
Power Management
figuration.
plexing options.
host.
marizes the registers’ layouts.
vides details of software-to-hardware interface conventions.
23
CC
, the core may be programed to monitor
CC
, which remains active
www.national.com
CC
.

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