pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 257

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
5.0 Host Controller Interface Modules
Host Interface PM n Data Out Buffer (HIPMnDO)
The HIPMnDO register allows the core firmware to write to the PM port DBBOUT register while setting the PM port OBF bit
in the Status register. If enabled, an IRQ11 (and/or SCI and/or SMI, in PC87570 Compatible mode) interrupt is sent at that
time. If the core interrupt on PM port output buffer empty is enabled, writing to HIPMnDO de-asserts it (low).
Location: Channel 1 - 00 FEAE
Type:
Host Interface PM n Data Out Buffer with SCI (HIPMnDOC)
The HIPMnDOC register has the same function as the HIPMnDO register. In addition, it generates an SCI interrupt when
OBF is set and hardware SCI generation is enabled.
Location: Channel 1 - 00 FEB2
Type:
Host Interface PM n Data Out Buffer with SMI (HIPMnDOM)
The HIPMnDOM register has the same function as the HIPMnDO register. In addition, it generates an SMI interrupt when
OBF is set and hardware SMI generation is enabled.
Location: Channel 1 - 00 FEB4
Type:
Bit
Name
Bit
Name
Bit
Name
7-0
7-0
7-0
Bit
Bit
Bit
PM Channel DBBOUT Data.
PM Channel DBBOUT Data.
PM Channel DBBOUT Data.
Channel 2 - 00 FEC0
WO
Channel 2 - 00 FEC4
WO
Channel 2 - 00 FEC6
WO
7
7
7
16
16
16
16
16
16
6
6
6
5
5
5
PM Channel DBBOUT Data
PM Channel DBBOUT Data
PM Channel DBBOUT Data
(Continued)
Description
Description
Description
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