pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 80

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pc87591l-n05

Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
4.0 Embedded Controller Modules
4.1.9
The BIU provides the following support for development systems.
Bus Status Signals
The Bus Status BST0-2 signals indicate whether a transaction on the core bus was issued; they also indicate the transaction
type; see Table 31 on page 237.
Core Bus Monitoring
The core bus monitoring cycle is a non-data transfer bus cycle. It takes a single clock cycle - T1. On this cycle:
The core bus monitoring cycle, as shown in Figure 25, is generated only when bit 1 (OBR) in BCFG register is 1.
• The address pins display the address of the internal device accessed on the core bus.
• CBRD indicates the direction of the access (read or write).
• BE0-1 indicate which data bus bytes are accessed (lower or upper).
• BST0-2 display the core bus status.
Development Support
Bus State
Figure 25. Core Bus Monitoring Bus Cycle
CLK
A0-12,
A16-20
SEL0-2,
SELIO
BE0-1
WR0-1
D0-15
CBRD
RD
BST0-2
(Continued)
T1
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Revision 1.2

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