pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 308

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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6.0 Host-Controlled Modules and Host Interface
SuperI/O Configuration 6 Register (SIOCF6)
Write access to this register can be inhibited by setting bit 7 of this register. Activation of each logical device (bits 0-4) is also
affected by bit 0 of the logical device Activate register, index 30
Location: Index 26
Type:
SuperI/O Revision ID Register (SRID)
This register contains the ID number of the specific family member (Chip ID) and the chip revision number (Chip Rev). The
Chip Rev is incremented on each revision.
Location: Index 27
Type:
Bit
Name
Reset
Bit
Name
Reset
3-0
6-5
Bit
4-0
7-5
Bit
4
7
Reserved.
RTC Disabled.
0: Enabled (default)
1: Disabled
General-Purpose Scratch.
SIOCF6 Software Lock. When set to 1 by software, it and other bits in this register can be cleared only by Host
Domain Hardware reset.
0: Write access to bits 0-6 of this register enabled (default)
1: Bits 6-0 of this register are read only.
Chip Rev. Identifies the device revision.
Chip ID. Identifies a specific device.
Bits
7 6 5 Device
1 1 1: , PC87591L-N05
Other:
R/W
RO
SIOCF6 SW
Lock
See values in field description
16
16
7
0
7
Reserved
Chip ID
General-Purpose
6
0
6
Scratch
5
0
5
Disabled
RTC
Description
308
Description
X
4
0
4
16
, and bit 0 of SIOCF1 register.
(Continued)
3
0
3
X
Chip Rev
2
0
2
X
Reserved
X
1
0
1
X
0
0
0
Revision 1.2