pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 273

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
5.0 Host Controller Interface Modules
Shared Memory Core Override Write Protect Registers 0-2 (SMCOWP0-2)
SMCOWP0-2 are 16-bit registers that provide override on the host write protection bits. For the host to be able to write a
memory location, both the Host Write Protection bit (controlled through the Shared Memory Host Access Protect Register 1
or 2) and the associated bit in SMCOWP0-2 should be cleared. Each bit in this register is associated with a memory block,
as described in the bit description. Bits in these registers may be RO or RW depending on their position and the size of the
core and host boot blocks. These registers are cleared on reset and change in value of
Location: 00 F920
Type:
Bit
Name
Reset
Bit
Name
Reset
Bit
Name
Reset
Bit
Name
Reset
Bit
Name
Reset
15-0 ORPLA15-0 (Override Read Protect Low Addresses 15 through 0).
Bit
ORP15-2
ORP31-16 (Override Read Protect 15 through 0).
Each bit affects the host’s ability to read from one block. On the low addresses (covered by ORPLAi), the block
size is 8 Kbytes. For the other blocks it is 64 Kbytes. The block address is calculated as follows:
See Figure 93 on page 267 for a description of the block mapping. Bit 7 (ORPLA7) in SMCORP0 register is read
only.
0: Do not override the host read protect setting for the block
1: Host read for this block is disabled regardless of the setting of the respective bit in the host register
The reset values of these registers are as follows:
The following access limitations apply to the register bits:
R/W
Low address blocks, ORPLAi: from i*8K to (i+1)*8K 1
Other blocks, ORPLj: from j*64K to (j+1)*64K
Core boot blocks that cover address 00 0000
Host boot blocks not in above group and from (MBTA
All other blocks:
Core boot blocks that cover address 00 0000
Host boot blocks not in above group and ranging from (MBTA
All other blocks:
15
15
15
15
15
16
(Override Read Protect 15 through 2).
, 00 F922
14
14
14
14
14
13
13
13
13
13
16
, 00 F924
12
12
12
12
12
11
11
11
11
11
16
See bit description below
10
10
10
10
10
See bit description below
(Continued)
OWP15-2
ORP15-2
9
9
9
9
9
16
16
Description
273
to CR_Boot_Block_Size:
to CR_Boot_Block_Size:
OWPLA15-0
OWP 31-16
ORP 31-16
8
8
8
8
8
FFFF
FFFF
FFFF
Host_Boot_Block_Size) to MBTA:
16
16
16
7
7
7
7
7
6
6
Host_Boot_Block_Size) to MBTA: RO
6
6
6
5
5
5
5
5
SMCTA
4
4
4
4
4
.
3
3
3
3
3
2
2
2
2
2
Reserved
Reserved
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1
0
1
1
1
1
1
0
1
RO
RW
0
0
0
0
0
0