pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 15

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
Table of Contents
5.0
4.20
Host Controller Interface Modules
5.1
5.2
4.19.8
DEVELOPMENT SYSTEM SUPPORT ................................................................................... 236
4.20.1
4.20.2
4.20.3
4.20.4
4.20.5
4.20.6
4.20.7
4.20.8
KEYBOARD AND MOUSE CONTROLLER INTERFACE ....................................................... 242
5.1.1
5.1.2
5.1.3
5.1.4
POWER MANAGEMENT (PM) CHANNELS ........................................................................... 251
5.2.1
5.2.2
Features .................................................................................................................... 236
The ISE Interrupt ....................................................................................................... 236
Break Line and Reset Output Interrupt ...................................................................... 236
TRIS Strap Input Pin .................................................................................................. 236
Freezing Events ......................................................................................................... 237
Monitoring Activity During Development .................................................................... 237
On-Chip Hardware Breakpoint .................................................................................. 238
CR16B Development Support Registers ................................................................... 239
Features .................................................................................................................... 242
General Description ................................................................................................... 242
Host Interface Registers ............................................................................................ 245
Core Interface Registers ............................................................................................ 247
Features .................................................................................................................... 251
General Description ................................................................................................... 251
Usage Hints .............................................................................................................. 235
(Continued)
Debug Transmit Data Registers 0, 2, 4, 6, 8, 10, 12 and 14 (DBGTXD0-14) ...... 232
Debug Transmit Lock Register (DBGTXLOC) ...................................................... 233
Debug Transmit Status Register (DBGTXST) ...................................................... 233
Debug TINT Assert Register (DBGTINT) ............................................................. 233
Debug Abort Generate Register (DBGABORT) ................................................... 234
Debug ISE Source Registers A (DBGISESRCA) ................................................. 234
Bus Status Signals ............................................................................................... 237
Transaction Effect on the External Bus ................................................................ 238
Pipe Status Signals (PFS and PLI) ...................................................................... 238
Debug Configuration Register (DBGCFG) ........................................................... 239
Debug Freeze Enable Register (DBGFRZEN) ..................................................... 240
Debug Freeze Enable Register2 (DBGFRZEN2) ................................................. 241
Host Addresses .................................................................................................... 242
Core Interrupts ..................................................................................................... 242
Host Interrupts ...................................................................................................... 242
Keyboard/Mouse Channel (6016, 6416) .............................................................. 243
Status Read .......................................................................................................... 244
Host Interface Register Map ................................................................................ 245
Data Out Buffer Register (DBBOUT, Legacy 6016) ............................................. 245
Status Register (STATUS, Legacy 6416) ............................................................. 246
Data In Buffer Register (DBBIN, Legacy 6016) .................................................... 246
Command In Buffer Register (COMAND, Legacy 6416) ...................................... 246
Core Interface Register Map ................................................................................ 247
Host Interface Control Register (HICTRL) ............................................................ 247
Host Interface IRQ Control Register (HIIRQC) ..................................................... 248
Host Interface Keyboard/Mouse Status Register (HIKMST) ................................ 249
Host Interface Keyboard Data Out Buffer Register (HIKDO) ............................... 249
Host Interface Mouse Data Out Buffer Register (HIMDO) ................................... 250
Host Interface Keyboard/Mouse Data In Buffer Register (HIKMDI) ..................... 250
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