pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 239

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
4.0 Embedded Controller Modules
4.20.8 CR16B Development Support Registers
For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 32.
CR16B Development Support Register Map
Debug Configuration Register (DBGCFG)
The DBGCFG register controls the configuration of debug support features. On reset, DBGCFG is cleared (0).
Only the software development tools may access DBGCFG. This enables application software to be binary compatible in all
environments.
Location: 00 FF16
Type:
Bit
Name
Reset
7-3
Bit
0
1
2
ON.
0: In IRE environment, this bit is always cleared to 0; any data written to it is ignored. The ON bit becomes read
1: In OBD and DEV environments, enables the following debug support features:
FREEZE.
0: No effect (default).
1: When ON is 1, the watchdog timer is stopped from counting. All bits that use destructive reads (i.e., bits set or
BRKLE (Break Line Enable).
0: Break Line input is ignored by core (default)
1: In DEV environment, when BRKLE is set, the BRKL input signal is passed to the core
Reserved.
R/W
only when DBGL bit in DCR register in the core is set (default).
- ISE interrupt signal
- Use of other bits in DBGCFG register
cleared by read operations and other events triggered by reads) become indifferent to reads. An exception is
NMISTAT register, which is always affected by reads. The DBGFRZEN and DBGFRZEN2 registers control the
impact of FREEZE bit on a group of modules, enabling each module in the group to be indifferent to the
FREEZE being set. FREEZE has no effect when ON is 0.
DBGCFG
DBGFRZEN
DBGFRZEN2 Debug Freeze Enable 2
16
7
0
Mnemonic
6
0
Debug Configuration
Debug Freeze Enable
Reserved
5
0
(Continued)
Register Name
Description
239
4
0
3
0
BRKLE
2
0
Type
R/W
R/W
R/W
FREEZE
1
0
www.national.com
ON
0
0