pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 18
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
- Current page: 18 of 401
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www.national.com
Table of Contents
6.2
6.1.9
6.1.10
6.1.11
6.1.12
6.1.13
6.1.14
REAL-TIME CLOCK (RTC) ..................................................................................................... 318
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
6.2.10
6.2.11
6.2.12
6.2.13
6.2.14
6.2.15
Mobile System Wake-Up Control (MSWC) Configuration ......................................... 310
Keyboard and Mouse Controller (KBC) Configuration ............................................... 310
Shared Memory Configuration ................................................................................... 311
Real Time Clock (RTC) Configuration ....................................................................... 315
Power Management Interface Channel 1 Configuration ............................................ 317
Power Management Interface Channel 2 Configuration ............................................ 317
Bus Interface ............................................................................................................. 318
RTC Clock Generation .............................................................................................. 318
Internal Oscillator ....................................................................................................... 318
External Oscillator ..................................................................................................... 319
Timing Generation ..................................................................................................... 320
Timekeeping .............................................................................................................. 320
Updating .................................................................................................................... 321
Alarms ....................................................................................................................... 321
Power Supply ............................................................................................................ 322
System Bus Lockout .................................................................................................. 323
Power-Up Detection .................................................................................................. 323
Oscillator Activity ....................................................................................................... 324
Interrupt Handling ...................................................................................................... 324
Battery-Backed RAMs and Registers ........................................................................ 325
RTC Registers ........................................................................................................... 325
(Continued)
SuperI/O Configuration 1 Register (SIOCF1) ....................................................... 306
SuperI/O Configuration 5 Register (SIOCF5) ....................................................... 307
SuperI/O Configuration 6 Register (SIOCF6) ....................................................... 308
SuperI/O Revision ID Register (SRID) ................................................................. 308
SuperI/O Configuration 8 Register (SIOCF8) ....................................................... 309
SuperI/O Configuration 9 Register (SIOCF9) ....................................................... 309
SuperI/O Configuration D Register (SIOCFD) ...................................................... 309
Logical Device 4 (MSWC) Configuration .............................................................. 310
Logical Devices 5 and 6 (Mouse and Keyboard) Configuration ........................... 310
Logical Device 15 (0F
Memory Range Programing ................................................................................. 311
Shared Memory Configuration Register ............................................................... 312
Shared Memory Base Address High Byte Register ............................................. 313
Shared Memory Base Address Low Byte Register .............................................. 313
Shared Memory Size Configuration Register ....................................................... 314
Logical Device 16 (10
RAM Lock Register (RLR) .................................................................................... 315
Date Of Month Alarm Register Offset (DOMAO) .................................................. 316
Month Alarm Register Offset (MONAO) ............................................................... 316
Century Register Offset (CENO) .......................................................................... 316
Logical Device 17 (11
Logical Device 18 (12
Connections ......................................................................................................... 320
Signal Parameters ................................................................................................ 320
Seconds Register (SEC) ...................................................................................... 326
Seconds Alarm Register (SECA) ......................................................................... 327
16
16
16
16
) RTC Configuration ........................................................ 315
) Power Management Channel 1 .................................... 317
) Power Management Channel 2 .................................... 317
) (Shared Memory) Configuration ................................... 311
18
Revision 1.2
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