pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 114

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

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4.0 Embedded Controller Modules
Weak Pull-Up
The weak pull-up is enabled when the corresponding bit of PyWPU is set (1). This pull-up can prevent the input from being
in an undefined state.
Alternate Function
PyALT controls the use of each of the port pins for GPI or for the pin’s respective alternate function.
When a PxALT bit is cleared (0):
When a bit in PxALT is set (1):
Data Input
The Data Input (PyDIN) register returns the current value/state of the pin. This register can always be read.
4.5.4
Output Only Port with Alternate Function
The General-Purpose Output (GPO) port (Pz) is a subset of the GPIO functions. It enables the port to be used as a GPO
port or as an output signal for an alternate function. Figure 35 shows its functionality.
Output Buffer
The output buffer is a TRI-STATE buffer. The output type (i.e., CMOS or TTL) and its driving capabilities are described in
Section 2.2 on page 38.
Alternate Function
The PzALT controls the use of each of the port pins for GPO or for the pin’s respective alternate function.
When a PzALT bit is cleared (0):
When a bit in PzALT is set (1):
Data Output
The Data Out (PzDOUT) register holds the data to be driven onto the pin.
• The corresponding pin is used as a GPI pin.
• The input buffer is routed to the Data Input register.
• The pull-up is enabled when PyWPU is set.
• The corresponding pin is used for an alternate function (i.e., a signal to some other PC87591L-N05 module).
• The input buffer is always enabled; therefore, to minimize current consumption, the signal should be held above V
• The pull-up is enabled when both the PyWPU is set and the output buffer is put in TRI-STATE.
• The corresponding pin is used as a GPO pin.
• The output buffer is controlled by the Data Output register.
• The corresponding pin is used for an alternate function (i.e., a signal from or to some other module of the PC87591L-
• The output buffer data is controlled by signals coming from the alternate module.
In this case, the input buffer is blocked, except when the buffer is actually being read.
or below GND+0.2V.)
N05).
GPO Port Pz
Alt Device
Data Output
Data Output
Register
Alternate
Function
Register
{
{
Figure 35. GPO Port Pz Schematic Diagram
(PzDOUT)
Data Out
PzAlt
(Continued)
Alt
114
Alt
PIN
Revision 1.2
CC
0.2