pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 107
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pc87591l-n05
Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L-N05.pdf
(401 pages)
- Current page: 107 of 401
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Revision 1.2
4.0 Embedded Controller Modules
Edge Detection Register (WKEDG1)
Byte-wide read/write register that configures the trigger condition of the input signals WUI10 to WUI17. The register is
cleared on reset. This configures all associated input signals to be triggered on a rising edge.
Location: 00 FFC0
Type:
Edge Detection Register (WKEDG2)
Byte-wide read/write register that configures the trigger condition of the input signals WUI20 to WUI27. The functionality of
the register is identical to the WKEDG1 register described above.
Location: 00 FFC2
Type:
Edge Detection Register (WKEDG3)
Byte-wide read/write register that configures the trigger condition of the input signals WUI30 to WUI37. The functionality of
the register is identical to the WKEDG1 register described above.
Location: 00 FFC4
Type:
Edge Detection Register (WKEDG4)
Byte-wide read/write register that configures the trigger condition of the input signals WUI40 to WUI47. The functionality of
the register is identical to the WKEDG1 register described above.
Location: 00 FFC6
Type:
Pending Register (WKPND1)
Byte-wide read/write register that latches the occurrence of a selected trigger condition associated with the input signals
WUI10 to WUI17. On reset, the WKPND1 register is cleared (0). This indicates that no occurrence of the selected trigger
condition is pending.
Note: Only software can set the register bits; only the WKPCL1 register can clear them. Writing a 0 to any of the bits
Location: 00 FFC8
Type:
Bit
Name
Reset
Bit
Name
Reset
7-0
7-0
Bit
Bit
leaves their values unchanged. The WKPND1 register format is shown below:
Edge Selection. For inputs WUI10 through WUI17. Each bit is associated with one of eight inputs.
0: Low-to-High transition (default)
1: High-to-Low transition
Wake-Up Pending. If set, (1) indicates that a valid trigger condition occurred on the associated input.
R/W
R/W
R/W
R/W
R/W
16
16
16
16
16
7
0
7
0
6
0
6
0
5
0
5
0
(Continued)
WKED17-WKED10
WKPD17-WKPD10
Description
Description
107
4
0
4
0
3
0
3
0
2
0
2
0
1
0
1
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