pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 41

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

Revision 1.2
2.0 Signal/Pin Description and Configuration
2.2.6
KBSIN7-0
KBSOUT15-0 68-64, 61-
IOPA7-0
IOPD1-0
IOPB7-3
IOPC6-1
IOPJ7-2
IOPL4-3
IOPM7-0
IOPQ2-1
IOPQ3
IOPQ0
IOPB2-0
IOPC7
IOPD7-2
IOPF7-0
Signal
General-Purpose I/O (GPIO) and Internal Keyboard Scan
80-77,
74-71
56, 53-49
43, 40-36,
33-32
29, 26
165, 6-5,
164-163
176-175,
172-169
76-75, 70-
69, 63-62
48, 103
28-27, 4-3,
156-155,
149-148
23-22
47
8
162, 154-
153
1
55-54, 42-
41, 31-30
119-114,
111-110
Pin(s)
LQFP
R10, P11,
N12, M11,
N11, M10,
P9, R8
P8, N9,
N8, P7,
M8, P6,
M7, N6,
R6, P5,
M6, R5,
M5, N4,
R4, P3
N2, M2,
L1, N3,
M4, K1,
L4, K2
K4, K3
D5, D1,
C2, B6, A7
A2, B3, B4,
A5, C3, D4
P10, R9,
N10, M9,
N7, R7
R3, K13
J2, H1, C1,
B1, B8,
C7, B10,
D9
J3, H3
R2
E4
C5, C8, B9 I/O IN
A1
N5, P4, N1,
M1, J1, L3
G15, E13,
F12, G14,
H15, F13,
G13, H13
Ball(s)
FBGA
I/O
I/O IN
I/O IN
I/O IN
I/O IN
O
O
I
IN
Buffer
TS
CS
TS
Type
TS
TS
TS
OD
O
/O
1/2
/O
/IN
/O
/O
/O
6
2/12
PCI
3/6
1/2
2/4
AC
Power
Well
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
DD
CC
CC
41
Keyboard Scan Inputs. The input side of the internal
keyboard scan lines. These inputs may be configured to
work with either Schmitt trigger inputs, for operation with
switch based keyboards, or with internal analog voltage
comparators to interface to a resistive keyboard matrix.
KBSIN7-0 are referenced to V
work using a 3.3V supply. See Section 4.14 on page 197
for more details.
Keyboard Scan Outputs. The output side of the internal
keyboard scan lines.
General-Purpose I/O Ports. The GPIO registers are
accessible by the core for read, write and configuration.
Each of these GPIO signals can be individually configured
to be input or output. The pins may be used as GPIO or
assigned to their respective alternate functions. See
Section 2.4 on page 49 for GPIO pin assignment to
alternate functions. See Section 4.5 on page 110 for
further details on the GPIO pins and their functionality.
(Continued)
Description
CC
and are designed to
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