pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 225

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pc87591l-n05

Manufacturer Part Number
pc87591l-n05
Description
Lpc Mobile Embedded Controller
Manufacturer
National Semiconductor Corporation
Datasheet
Revision 1.2
4.0 Embedded Controller Modules
TAP Signals
The TAP interface signals to the JTAG serial bus are: Test Clock Input (TCK), Test Mode Select Input (TMS), Test Data Input
(TDI) and Test Data Output (TDO). The TAP controller is reset at Power-Up reset only; see Section 3.2 on page 61.
TCK. TCK provides the clock for the JTAG serial bus and the TAP controller. Stored-state devices in the TAP maintain their
state indefinitely after the signal applied to TCK is stopped.
TMS. The TAP controller next state is set by the TMS value and its current state. The TAP samples the signal presented at
TMS on the rising edge of TCK.
Circuitry, fed from TMS, produces the same response to the application of a logic 1 as for a non-driven input.
TDI. This is the data and instructions serial input. The TAP samples the signal presented at TDI on the rising edge of TCK.
Circuitry fed from TDI produces the same response to the application of a logic 1 as for a non-driven input.
When data is shifted from TDI towards TDO, test data received at TDI appears without inversion at TDO following a number
of rising and falling edges of TCK. This is determined by the length of the instruction or Test Data register selected.
TDO. This is the data and instructions serial output. The signal driven through TDO changes its state only after the falling
edge of TCK.
The TDO driver is set to its inactive drive state, except while data or an instruction is being scanned.
TAP Controller
The TAP controller is a synchronous, finite state machine that responds to changes in the TMS and TCK signals and controls
the sequence of operations of the PC87591L-N05 reset, ISE interrupt control and data link circuitry.
Figure 78 shows the TAP controller state diagram.
Note: The value for each state transition represents the signal on TMS for a rising edge at TCK.
1
0
Tap-Reset
Run-Test
Idle
0
1
Figure 78. TAP Controller State Diagram
1
0
(Continued)
1
Capture-DR
Update-DR
Pause-DR
DR-Scan
Exit1-DR
Exit2-DR
Shift-DR
Select-
0
0
1
0
1
1
225
0
1
1
0
0
1
0
1
Capture-IR
Update-IR
Pause-IR
IR-Scan
Exit1-IR
Exit2-IR
Shift-IR
Select-
0
0
1
0
1
1
0
1
0
0
1
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