pc87591l-n05 National Semiconductor Corporation, pc87591l-n05 Datasheet - Page 310

• Manufacturer Part Number: pc87591l-n05
• Description: Lpc Mobile Embedded Controller
• Manufacturer: National Semiconductor Corporation

www.national.com
6.0 Host-Controlled Modules and Host Interface
6.1.9
Logical Device 4 (MSWC) Configuration
Table 46 lists the configuration registers that affect the MSWC. See Section 6.1.2 on page 302 for a detailed description of
these registers.
6.1.10 Keyboard and Mouse Controller (KBC) Configuration
Logical Devices 5 and 6 (Mouse and Keyboard) Configuration
Tables 47 and 48 list the configuration registers that affect the Mouse and the Keyboard respectively. Only the last register
(F0
on page 302 for descriptions of the other configuration registers.
Usage Hints: It is recommended to set the type of interrupt request as level and its level of interrupt as high.
30
60
61
70
71
74
75
30
60
61
62
63
70
71
74
75
30
70
71
74
75
16
Index
Index
Index
16
16
16
16
16
16
16
) is described here. See “Standard Logical Device Configuration Register Definitions” on page 299 and Section 6.1.2
16
16
16
16
16
16
16
16
16
16
16
16
16
16
1. The logical device registers are maintained, and all wake-up detection mechanisms are functional.
Mobile System Wake-Up Control (MSWC) Configuration
Activate. When bit 0 is cleared, the registers of this logical device are not accessible.
Base Address MSB register.
Base Address LSB register. Bits 4-0 (for A4-0) are read only, ‘00000’.
Interrupt Number.
Interrupt Type. Bit 1 is read/write. Other bits are read only.
Report no DMA assignment.
Report no DMA assignment.
Activate. See also bit 0 of the SIOCF1.
Base Address MSB register. Bits 7-3 (for A15-11) are read only, ‘00000’.
Base Address LSB register. Bits 2-0 are read only, ‘000’.
Command Base Address MSB register. Bits 7-3 (for A15-11) are read only, ‘00000’.
Command Base Address LSB. Bits 2-0 are read only, ‘100’.
KBD Interrupt Number and Wake-Up on IRQ Enable register.
KBD Interrupt Type. Bit 1 is read/write; other bits are read only.
Report no DMA assignment.
Report no DMA assignment.
Activate. See also bit 0 of the SIOCF1. When the Mouse of the KBC is inactive, the
IRQ selected by the Mouse Interrupt Number and Wake-Up on IRQ Enable register
(index 70
handling the PS/2 Mouse.
Mouse Interrupt Number and Wake-Up on IRQ Enable register.
Mouse Interrupt Type. Bit 1 is read/write; other bits are read only.
Report no DMA assignment.
Report no DMA assignment.
Table 46. Mobile System Wake-Up Control (MSWC) Configuration Registers
16
) is not asserted. This register has no effect on host KBC commands
Keyboard Configuration Register or Action
Mouse Configuration Register or Action
Configuration Register or Action
Table 48. Keyboard Configuration Registers
Table 47. Mouse Configuration Registers
310
(Continued)
1
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
Type
RO
RO
R/W
R/W
R/W
R/W
R/W
RO
RO
Reset
Reset
Reset
0C
00
03
04
04
00
00
60
00
64
01
03
04
04
00
00
00
00
03
04
04
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Revision 1.2