MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 69

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.3.16 ADC High Limit Registers (ADC_HILIMn)
Each ADC sample is compared against the values in the limit registers. The comparison
is based upon the raw conversion value with no offset correction applied. The limit
register used corresponds to the result register the value will be written to. The high limit
register is used for the comparison of Result > High Limit. The low limit register is used
for the comparison of Result < Low Limit. The limit checking can be disabled by
programming the respective limit register with 7FF8h for the high limit and 0000h for the
low limit. At reset, limit checking is disabled.
Addresses: ADC_HILIM0 – F080h base + 24h offset = F0A4h
2.3.17 ADC Offset Registers (ADC_OFFSTn)
The value of the offset register is used to correct the ADC result before it is stored in the
RSLT registers.
The offset value is subtracted from the ADC result. To obtain unsigned results, program
the respective offset register with a value of $0000, thus giving a result range of $0000 to
$7FF8.
Freescale Semiconductor
Reset
Read
Write
Bit
Reserved
Reserved
HLMT
14–3
Field
2–0
15
15
0
0
ADC_HILIM1 – F080h base + 25h offset = F0A5h
ADC_HILIM2 – F080h base + 26h offset = F0A6h
ADC_HILIM3 – F080h base + 27h offset = F0A7h
ADC_HILIM4 – F080h base + 28h offset = F0A8h
ADC_HILIM5 – F080h base + 29h offset = F0A9h
ADC_HILIM6 – F080h base + 2Ah offset = F0AAh
ADC_HILIM7 – F080h base + 2Bh offset = F0ABh
14
1
This read-only bit is reserved and always has the value zero.
High Limit Bits
This read-only bitfield is reserved and always has the value zero.
13
1
12
1
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
1
ADC_HILIMn field descriptions
10
1
1
9
Preliminary
HLMT
1
8
Description
1
7
1
6
Chapter 2 Analog-to-Digital Converter (ADC)
1
5
1
4
1
3
0
2
0
0
1
0
0
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